u-boot.git/arch/powerpc, branch v2014.01

powerpc/t208x: fix macro CONFIG_SYS_FSL_NUM_USB_CTRLS

2014-01-02T22:10:13Z

CONFIG_SYS_FSL_NUM_USB_CTRLS is no longer used, update it to new CONFIG_USB_MAX_CONTROLLER_COUNT. Signed-off-by: Shengzhou Liu

powerpc/mpc85xx: Add support for single source clocking

2014-01-02T22:10:13Z

Single-source clocking is new feature introduced in T1040. In this mode, a single differential clock is supplied to the DIFF_SYSCLK_P/N inputs to the processor, which in turn is used to supply clocks to the sysclock, ddrclock and usbclock. So, both ddrclock and syclock are driven by same differential sysclock in single-source clocking mode whereas in normal clocking mode, generally separate DDRCLK and SYSCLK pins provides reference clock for sysclock and ddrclock DDR_REFCLK_SEL rcw bit is used to determine DDR clock source -If DDR_REFCLK_SEL rcw bit is 0, then DDR PLLs are driven in normal clocking mode by DDR_Reference clock -If DDR_REFCLK_SEL rcw bit is 1, then DDR PLLs are driven in single source clocking mode by DIFF_SYSCLK Add code to determine ddrclock based on DDR_REFCLK_SEL rcw bit. Signed-off-by: Poonam Aggrwal Signed-off-by: Priyanka Jain

Makefile: Select objects by CONFIG_ rather than $(ARCH) or $(CPU)

2013-12-16T13:59:42Z

Convert like follows: CPU mpc83xx -> CONFIG_MPC83xx CPU mpc85xx -> CONFIG_MPC85xx CPU mpc86xx -> CONFIG_MPC86xx CPU mpc5xxx -> CONFIG_MPC5xxx CPU mpc8xx -> CONFIG_8xx CPU mpc8260 -> CONFIG_8260 CPU ppc4xx -> CONFIG_4xx CPU x86 -> CONFIG_X86 ARCH x86 -> CONFIG_X86 ARCH powerpc -> CONFIG_PPC Signed-off-by: Masahiro Yamada

common/cmd_bootm: extend do_bootm_vxworks to support the new VxWorks boot interface.

2013-12-16T13:59:05Z

The next version VxWorks adopts device tree (for PowerPC and ARM) as its hardware description mechanism. For PowerPC, the boot interface conforms to the ePAPR standard, which is: void (*kernel_entry)(ulong fdt_addr, ulong r4 /* 0 */, ulong r5 /* 0 */, ulong r6 /* EPAPR_MAGIC */, ulong r7 /* IMA size */, ulong r8 /* 0 */, ulong r9 /* 0 */) For ARM, the boot interface is: void (*kernel_entry)(void *fdt_addr) Signed-off-by: Miao Yan [trini: Fix build error when !CONFIG_OF_FDT is set, typo on PowerPC, missing extern ft_fixup_num_cores] Signed-off-by: Tom Rini

PowerPC: merge commonly-defined flags

2013-12-13T14:17:32Z

PLATFORM_RELFLAGS += -meabi PLATFORM_CPPFLAGS += -ffixed-r2 were defined in all arch/powerpc/${CPU}/config.mk. This commit moves them to arch/powerpc/config.mk. Signed-off-by: Masahiro Yamada

powerpc/mpc85xx: Update CONFIG_SYS_FSL_TBCLK_DIV for T1040

2013-12-11T19:12:54Z

The default value of CONFIG_SYS_FSL_TBCLK_DIV is 16. So, update its value as default. Signed-off-by: Prabhakar Kushwaha Acked-by: York Sun

powerpc/t4240: Add a frequency setting case for fman1

2013-12-11T19:12:04Z

A new valid setting case added for fman1, it uses platform frequency. Signed-off-by: Shaohui Xie Acked-by: York Sun

powerpc/mpc8349: Use generic mpc85xx DDR driver

2013-12-04T22:55:05Z

MPC8349 has been using mpc85xx DDR driver through a symbolic link to mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set under driver/ddr/fsl/, the link is replaced by referring driver directly. We now can simply enable the macro and use the driver. Other mpc83xx SoCs still use their own driver. Signed-off-by: York Sun

T4240: Address T4240/T4160 Rev2.0 DDR clock change

2013-12-04T22:54:42Z

MEM_PLL_RAT on T4240/T4160 Rev2.0 uses a value which is half of Rev1.0. It's 12 in Rev1.0, for Rev2.0 it uses 6. Signed-off-by: Roy Zang Signed-off-by: Shaohui Xie Acked-by: York Sun

powerpc/corenet: CPC1 speculation disable

2013-12-04T22:54:10Z

In PBL RAMBOOT(SPI/SD/NAND boot) mode, CPC1 used as SRAM, should disable CPC1 speculation and keep it till relocation. Otherwise, speculation transactions will go to DDR controller, it will cause problem. Signed-off-by: Dave Liu Signed-off-by: Shaohui Xie Acked-by: York Sun