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<title>u-boot.git/arch/powerpc, branch v2015.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/powerpc?h=v2015.07</id>
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<updated>2015-05-28T12:18:20Z</updated>
<entry>
<title>powerpc: gitignore: ignore PowerPC DTBs</title>
<updated>2015-05-28T12:18:20Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-05-20T05:18:22Z</published>
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<id>urn:sha1:15b8973cdf5c772980973d275e3dd781b9dc01e0</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
</entry>
<entry>
<title>arch: Make board selection choices optional</title>
<updated>2015-05-12T22:10:02Z</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2015-05-12T19:46:23Z</published>
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<id>urn:sha1:a26cd04920dc069fd6e91abb785426cf6c29f45f</id>
<content type='text'>
By making the board selections optional, every defconfig will include
the board selection when running savedefconfig so if a new board is
added to the top of the list of choices the former top's defconfig will
still be correct.

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Stephen Warren &lt;swarren@wwwdotorg.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>ppc4xx: Remove sc3 board</title>
<updated>2015-05-10T13:59:38Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2015-05-07T11:00:23Z</published>
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<id>urn:sha1:27e721564591f6f0a5246dcee418cac9d061012e</id>
<content type='text'>
As this board seems to be unmaintained for quite some time, and its
not moved to the generic board ingrastructure, lets remove it.

This will also enable us to remove the CONFIG_AUTOBOOT_DELAY_STR2
and CONFIG_AUTOBOOT_STOP_STR2 macros, as this sc3 board is the
only one using one of this macros. A removal patch will follow
soon.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: Juergen Beisert &lt;jbeisert@eurodsn.de&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Add board support for ucp1020</title>
<updated>2015-05-04T16:26:26Z</updated>
<author>
<name>Oleksandr G Zhadan</name>
<email>oleks@arcturusnetworks.com</email>
</author>
<published>2015-04-29T20:57:39Z</published>
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<id>urn:sha1:8b0044ff5942943eaa49935f49d5006b346a60f8</id>
<content type='text'>
New QorIQ p1020 based board support from Arcturus Networks Inc.
http://www.arcturusnetworks.com/products/ucp1020/

Signed-off-by: Michael Durrant &lt;mdurrant@arcturusnetworks.com&gt;
Signed-off-by: Oleksandr G Zhadan &lt;oleks@arcturusnetworks.com&gt;
[York Sun: remove patman tags from commit message]
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Fix compiling error for common/cmd_gpio.c</title>
<updated>2015-05-04T16:26:09Z</updated>
<author>
<name>Oleksandr G Zhadan</name>
<email>oleks@arcturusnetworks.com</email>
</author>
<published>2015-04-28T17:59:50Z</published>
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<id>urn:sha1:d7732faad3104369fca72c071818b95ddb3e35db</id>
<content type='text'>
To replicate:
1. add to include/configs/p1_p2_rdb_pc.h "#define CONFIG_CMD_GPIO"
2. run `make P1020RDB-PC_defconfig`
3. run CROSS_COMPILE=powerpc-linux- make

and you will get:
common/built-in.o: In function `do_gpio':
u-boot/common/cmd_gpio.c:186: undefined reference to `gpio_request'
u-boot/common/cmd_gpio.c:194: undefined reference to `gpio_direction_input'
u-boot/common/cmd_gpio.c:195: undefined reference to `gpio_get_value'
u-boot/common/cmd_gpio.c:200: undefined reference to `gpio_get_value'
u-boot/common/cmd_gpio.c:203: undefined reference to `gpio_direction_output'
u-boot/common/cmd_gpio.c:209: undefined reference to `gpio_free

Signed-off-by: Michael Durrant &lt;mdurrant@arcturusnetworks.com&gt;
Signed-off-by: Oleksandr G Zhadan &lt;oleks@arcturusnetworks.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: Add peripheral clock support</title>
<updated>2015-05-04T16:25:39Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@freescale.com</email>
</author>
<published>2015-04-22T05:57:40Z</published>
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<id>urn:sha1:2d9ca2c72c0fce33052f78f02cdc8ad0a5cf4292</id>
<content type='text'>
The SD clock could be generated by platform clock or peripheral
clock for some platforms. This patch adds peripheral clock
support for T1024/T1040/T2080. To enable it, define
CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@freescale.com&gt;
Cc: York Sun &lt;yorksun@freescale.com&gt;
Cc: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: Add adapter card type identification support</title>
<updated>2015-05-04T16:25:19Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@freescale.com</email>
</author>
<published>2015-04-22T05:57:00Z</published>
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<id>urn:sha1:5a8dbdc6b4b8b4b17c807c9bb23807cdc66f6feb</id>
<content type='text'>
Add adapter card type identification support by reading
FPGA STAT_PRES1 register SDHC Card ID[0:2] bits. To use this function,
define CONFIG_FSL_ESDHC_ADAPTER_IDENT.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@freescale.com&gt;
Cc: York Sun &lt;yorksun@freescale.com&gt;
Cc: Pantelis Antoniou &lt;panto@antoniou-consulting.com&gt;
[York Sun: resolve conflicts in README.fsl-esdhc]
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc/mpc85xx: Don't deref NULL if qman portal lacks cell-index</title>
<updated>2015-05-04T16:24:57Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2015-04-17T23:10:06Z</published>
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<id>urn:sha1:438031e1bc0a733f9494f2cb954725cd79543e1e</id>
<content type='text'>
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
Cc: Madalin-Cristian Bucur &lt;madalin.bucur@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>powerpc: add 2 common dcache assembly functions</title>
<updated>2015-05-04T16:24:42Z</updated>
<author>
<name>Valentin Longchamp</name>
<email>valentin.longchamp@keymile.com</email>
</author>
<published>2015-03-27T15:07:32Z</published>
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<id>urn:sha1:ac337168ad81a18e768e5e3cfff8d229adeb2b25</id>
<content type='text'>
This patch defines the 2 flush_dcache_range and invalidate_dcache_range
functions for all the powerpc architecture. Their implementation is
borrowed from the kernel's misc_32.S file and replace the ones from
mpc86xx and ppc4xx since they were equivalent.

This is a fix for the problem introduced by this patch:
http://patchwork.ozlabs.org/patch/448849/

Signed-off-by: Valentin Longchamp &lt;valentin.longchamp@keymile.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>fsl/pci: Set CFG_READY for PCIe v3.0 and later</title>
<updated>2015-05-04T16:24:23Z</updated>
<author>
<name>Minghuan Lian</name>
<email>Minghuan.Lian@freescale.com</email>
</author>
<published>2015-03-27T05:24:39Z</published>
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<id>urn:sha1:1d0b59a9b049443397f484ad03b88c6314bc7ebb</id>
<content type='text'>
Freescale PCIe controllers v3.0 and later need to set bit
CFG_READY to allow all inbound configuration transactions
to be processed normally when in EP mode. However, bit
CFG_READY has been moved from PCIe configuration space to
CCSR PCIe configuration register comparing previous version.
The patch is to set this bit according to PCIe version.

Signed-off-by: Ed Swarthout &lt;Ed.Swarthout@freescale.com&gt;
Signed-off-by: Roy Zang &lt;tie-fei.zang@freescale.com&gt;
Signed-off-by: Minghuan Lian &lt;Minghuan.Lian@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
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