u-boot.git/arch/powerpc, branch v2026.04

powerpc/mpc83xx: Move alignment padding into __u_boot_list section

2026-04-02T23:41:02Z

u-boot-dtb.bin is built by concatenating u-boot-nodtb.bin and u-boot.dtb. u-boot-nodtb.bin, in turn, is generated by objcopy'ing the contents of u-boot (U-Boot in ELF format) into a raw file. In order to find the bundled FDT (u-boot.dtb), the code in lib/fdtdec.c uses the _end symbol. Platform-specific linker scripts ensure that _end is 8-byte aligned, which is required by libfdt. For the PowerPC MPC83xx platform, the ALIGN(8) directive was outside a section, with the unfortunate effect that the potentially generated padding bytes would not be copied by objcopy. This resulted in a discrepancy between the _end symbol on the one hand, and the size of u-boot-nodtb.bin and thus the starting location of the actual FDT on the other side. Under these conditions, the FDT could not be found and boot would fail early. This commit fixes it by moving the ALIGN(8) into the __u_boot_list section, which is non-empty and thus copied into u-boot-nodtb.bin. Signed-off-by: J. Neuschäfer Reviewed-by: Tom Rini

board: nxp: Rename board directory from board/freescale to board/nxp

2026-01-28T06:26:50Z

This patch renames the board directory from board/freescale to board/nxp because NXP now provides Board Support Packages (BSPs) and tools for the former Freescale i.MX and other i.MX products. All relevant references have been updated accordingly. This change does not affect functionality. Signed-off-by: Alice Guo Reviewed-by: Fabio Estevam

powerpc: Update linker scripts to ensure appended device tree is aligned

2026-01-20T18:07:20Z

With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains that we must have ALIGN(x) statements inside of a section to ensure that padding is included and not simply that the linker address counter is incremented. To that end, this patch: - Aligns the final section before _end by 8-bytes by adding '. = ALIGN(8);' or changing an existing ALIGN(4) statement. - Ensure that we do have alignment by adding an ASSERT so that when not aligned we fail to link (and explain why). Signed-off-by: Tom Rini

powerpc: mpc83xx: Check the size of peripheral structs

2026-01-13T15:42:44Z

Peripheral registers on MPC83xx-series chips are declared in immap_83xx.h as a set of structs that ultimately fill the entire MMIO space of 1 MiB. This patch introduces a compile-time check of the size of each peripheral struct. The purpose of these checks is two-fold: 1. To quickly tell readers of the code the total size of each struct 2. To verify that the size does not change when a struct is edited If the size of a peripheral struct were to change by a few bytes due to an editing error, the result would be mayhem for all following peripherals, because all offsets would shift by the amount of the error. All new checks have been compile-tested. Signed-off-by: J. Neuschäfer

powerpc: remove unused legacy LED API

2025-12-05T16:34:52Z

No PPC upstream defconfig actually enables CONFIG_LED_STATUS and we're trying to get rid of the legacy LED API, so let's remove one of its last users. Signed-off-by: Quentin Schulz

cmd: spl: Remove ATAG support from this command

2025-10-03T22:55:44Z

While we continue to have some systems which support extremely legacy OS booting methods, we do not have use cases for supporting this in Falcon mode anymore. Remove this support and references from the documentation. Co-developed-by: Anshul Dalal Signed-off-by: Tom Rini

lmb: replace lmb_reserve() and lmb_alloc_addr() API's

2025-06-25T15:50:37Z

There currently are multiple allocation API's in the LMB module. There are a couple of API's for allocating memory(lmb_alloc() and lmb_alloc_base()), and then there are two for requesting a reservation for a particular memory region (lmb_reserve() and lmb_alloc_addr()). Introduce a single API lmb_alloc_mem() which will cater to all types of allocation requests and replace lmb_reserve() and lmb_alloc_addr() with the new API. Moreover, the lmb_reserve() API is pretty similar to the lmb_alloc_addr() API, with the one difference being that the lmb_reserve() API allows for reserving any address passed to it -- the address need not be part of the LMB memory map. The lmb_alloc_addr() does check that the address being requested is actually part of the LMB memory map. There is no need to support reserving memory regions which are outside the LMB memory map. Remove the lmb_reserve() API functionality and use the functionality provided by lmb_alloc_addr() instead. The lmb_alloc_addr() will check if the requested address is part of the LMB memory map and return an error if not. Signed-off-by: Sughosh Ganu Acked-by: Ilias Apalodimas

Merge patch series "Hex value prefix case cleanup"

2025-06-14T15:10:48Z

E Shattow says: Make consistent use of lowercase hexadecimal prefix '0x' throughout U-Boot. There are a few remaining uses of uppercase 'X' to denote hexadecimal prefix or placeholder in documentation and error messages. External devicetree-rebasing dts/upstream and the generated code of xilinx/zynq are ignored for the series. Link: https://lore.kernel.org/r/20250606224558.1117422-1-e@freeshell.de

arch: use lowercase hex prefix style

2025-06-14T15:09:40Z

Use consistent lowercase hex prefix style in arch/* Signed-off-by: E Shattow

Merge patch series "drop volatile from global data"

2025-06-13T22:57:34Z

Rasmus Villemoes says: There's really no reason for the gd pointer to have the volatile qualifier. In fact, I claim that it's completely unnecessary and just pessimizes code generation and forces ugly casts in lots of places. For example, see the casts in drivers/core/tag.c where elements are added to gd->dm_taglist, or a helper such as cyclic_get_list() that should not be needed. Also, it is what ends up standing in the way of an otherwise innocent code cleanup of list.h: https://lore.kernel.org/u-boot/20250522165656.GB2179216@bill-the-cat/ Note that riscv, x86 as well as arm64 with LTO enabled has not had this volatile qualifier, so it's unlikely there's any generic code that depends on it. Link: https://lore.kernel.org/r/20250604195612.2312979-1-ravi@prevas.dk