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<title>u-boot.git/arch/riscv/cpu/mpfs/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<title>riscv: create a custom CPU implementation for PolarFire SoC</title>
<updated>2025-12-08T04:10:39+00:00</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2025-11-19T12:38:42+00:00</published>
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<id>4d056a2037d3b4604ce2592d40ae24c6d7cf03bf</id>
<content type='text'>
PolarFire SoC needs a custom implementation of top_of_ram(), so stop
using the generic CPU &amp; create a custom CPU instead.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
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<pre>
PolarFire SoC needs a custom implementation of top_of_ram(), so stop
using the generic CPU &amp; create a custom CPU instead.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
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