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riscv: Skip riscv_cpu_setup() when CPU driver is disabled

2026-07-27T02:39:21Z

Building on commit c64fc632a86a ("riscv: cpu: Use CONFIG_IS_ENABLED(CPU) instead of plain ifdef"), add an early return in riscv_cpu_setup() when CONFIG_CPU is not enabled. This allows platforms to save code space in SPL by disabling CONFIG_SPL_CPU. Without this patch, building U-Boot with CONFIG_CPU=n and CONFIG_EVENT=y is broken: riscv_cpu_setup() is registered as an EVT_DM_POST_INIT_F event spy, and when the CPU uclass is unavailable uclass_find_first_device() returns no device, so the function returns -ENODEV. That in turn makes event_notify_null() in dm_init_and_scan() fail and triggers a boot hang ("initcall initf_dm() failed"). Returning 0 early avoids that failure. The compiler's dead-code elimination combined with --gc-sections removes the unreachable code and all associated static data, achieving significant size reduction without preprocessor guards: spl/u-boot-spl:all -4332 spl/u-boot-spl:rodata -2872 spl/u-boot-spl:text -1460 Signed-off-by: Michal Simek Reviewed-by: Yao Zi

spacemit: k1: enable SPL with debug UART

2026-07-21T08:57:13Z

Add SPL support featuring debug UART output for early boot diagnostics on K1 SoC. Signed-off-by: Raymond Mao Signed-off-by: Guodong Xu Tested-by: Songsong Zhang

spacemit: k1: support multi-board infrastructure

2026-07-21T08:57:13Z

Restructure K1 SoC support to handle multiple boards through a single configuration: 1. Rename bananapi-f3_defconfig to spacemit_k1_defconfig. 2. Move all K1 board files to board/spacemit/k1/. 3. Replace TARGET_BANANAPI_F3 with TARGET_SPACEMIT_K1 and rename the board's .h header to k1.h. Eliminates the need for board-specific defconfigs while maintaining hardware compatibility. Signed-off-by: Raymond Mao Signed-off-by: Guodong Xu Link: https://patch.msgid.link/20260519-b4-k1-spl-bring-up-v4-0-3915a2a904c1@riscstar.com Tested-by: Songsong Zhang

treewide: move bi_dram[] from bd to gd

2026-06-25T00:13:24Z

Currently, the bi_dram[] information is stored in the board info structure (bd). Because bd is only valid after reserve_board(), dram_init_banksize() must be called late in the initialization process. This limitation is problematic, as it forces us to rely on a variety of bespoke functions to determine board RAM, bank memory sizes, and other early setup requirements. By moving bi_dram[] into the global data (gd), we can run it earlier. This is particularly convenient since boards define their own dram_init_banksize() routines, which do not always rely on parsing Device Tree (DT) memory nodes. Additionally, U-Boot defaults to relocating to the top of the first memory bank. While boards currently use custom functions to override this behavior, having the DRAM bank information available earlier in gd makes relocating to a different bank trivial and standardizes the process. Reviewed-by: Anshul Dalal Tested-by: Michal Simek # Versal Gen 2 Vek385 Tested-by: Anshul Dalal Reviewed-by: Simon Glass Signed-off-by: Ilias Apalodimas Tested-by: Christophe Leroy (CS GROUP)

eeprom: starfive: Simplify get_ddr_size_from_eeprom()

2026-03-16T17:36:57Z

Directly return the DDR size instead of the field of 'DxxxExxx'. Move the function description to the header file. Return 0 instead of 0xFF if read_eeprom() fails. Reviewed-by: Heinrich Schuchardt Fixes: aea1bd95b61e ("eeprom: starfive: Enable ID EEPROM configuration") Signed-off-by: Hal Feng

riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist

2026-03-12T18:57:58Z

Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT. MPFS boards neither use SPL nor do they run main U-Boot in M-mode. So we don't need CONFIG_(SPL_)ACLINT either. Signed-off-by: Heinrich Schuchardt Acked-by: Conor Dooley

sifive: switch to OF_UPSTREAM

2026-03-12T18:56:52Z

Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot. Signed-off-by: Andreas Schwab Reviewed-by: Leo Yu-Chi Liang

treewide: Clean up DECLARE_GLOBAL_DATA_PTR usage

2026-02-17T19:50:22Z

Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and drop the unnecessary inclusion of asm/global_data.h. Headers should be included directly by the files that need them, rather than indirectly via global_data.h. Reviewed-by: Patrice Chotard #STMicroelectronics boards and STM32MP1 ram test driver Tested-by: Anshul Dalal #TI boards Acked-by: Yao Zi #TH1520 Signed-off-by: Peng Fan

riscv: Update linker scripts to ensure appended device tree is aligned

2026-01-20T18:07:21Z

With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains that we must have ALIGN(x) statements inside of a section to ensure that padding is included and not simply that the linker address counter is incremented. To that end, this patch: - Aligns the final section before _end (for U-Boot) or _image_binary_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final section before the symbol. - Remove a now-spurious '. = ALIGN(x);' statement that was intended to provide the above alignments. - Ensure that we do have alignment by adding an ASSERT so that when not aligned we fail to link (and explain why). Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Ilias Apalodimas Signed-off-by: Tom Rini

riscv: mpfs: move SoC level options to the CPU Kconfig

2025-12-08T04:10:43Z

There are multiple boards that use the PolarFire SoC, so extract the Kconfig sections that are determined at a CPU level from the board Kconfigs now that we have a CPU Kconfig. Signed-off-by: Conor Dooley