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<title>u-boot.git/arch/riscv/dts/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/riscv/dts/Makefile?h=master</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/riscv/dts/Makefile?h=master'/>
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<updated>2026-03-12T18:56:52Z</updated>
<entry>
<title>sifive: switch to OF_UPSTREAM</title>
<updated>2026-03-12T18:56:52Z</updated>
<author>
<name>Andreas Schwab</name>
<email>schwab@suse.de</email>
</author>
<published>2026-01-28T16:51:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4dcff3b572a1d67c35b7ed71253a6d85aefe4e9b'/>
<id>urn:sha1:4dcff3b572a1d67c35b7ed71253a6d85aefe4e9b</id>
<content type='text'>
Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot.

Signed-off-by: Andreas Schwab &lt;schwab@suse.de&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>dts: th1520: Switch to upstream devicetree</title>
<updated>2025-09-19T11:03:57Z</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-08-13T10:09:27Z</published>
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<id>urn:sha1:0d74bbfda38816dcb9b3e1b0fd63324849948443</id>
<content type='text'>
Imply OF_UPSTREAM in platform Kconfig option and adapt existing boards
to use the correct upstream devicetree paths.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: andes: Add Voyager device tree</title>
<updated>2025-08-14T07:33:00Z</updated>
<author>
<name>Leo Yu-Chi Liang</name>
<email>ycliang@andestech.com</email>
</author>
<published>2025-08-07T11:38:17Z</published>
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<id>urn:sha1:a25e1aacdbed4d80d05ea85a13cc944a8657d473</id>
<content type='text'>
Introduce the initial device tree support for Andes Voyager board.
We will convert to OF_UPSTREAM once the patch series for kernel is merged.

Signed-off-by: Randolph Sheng-Kai Lin &lt;randolph@andestech.com&gt;
Signed-off-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>xilinx: mbv: Use separate DTB for binman nodes</title>
<updated>2025-08-14T06:32:00Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2025-07-22T11:03:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=87bd5806e608b555ea4f84ae217e44d50525f968'/>
<id>urn:sha1:87bd5806e608b555ea4f84ae217e44d50525f968</id>
<content type='text'>
The commit d92fdb60677b ("binman: Add option for pointing to separate
description") added support for separating binman description to own file
not the be the part of DT for OS.
The main reason is that binman is not passing dt schema validation that's
why want to keep it separated.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Acked-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>dtc: Add Kconfig option to pad device tree blob</title>
<updated>2025-06-20T01:00:09Z</updated>
<author>
<name>Eric Schikschneit</name>
<email>eric.schikschneit@novatechautomation.com</email>
</author>
<published>2025-06-03T17:06:24Z</published>
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<id>urn:sha1:5ba5cbf5a29d54763f30b6685e6c06ffd51d29eb</id>
<content type='text'>
This will allow arch(s) that use device tree blobs to pad the end of the
device tree so they can be modified by board files at run time. This will
help prevent errors such as FDT_ERR_NOSPACE from occurring.

Signed-off-by: Eric Schikschneit &lt;eric.schikschneit@novatechautomation.com&gt;
[trini: Change default order so that X86 &amp;&amp; EFI_APP works correctly]
</content>
</entry>
<entry>
<title>riscv: dts: canaan: Add basic device tree for K230 CanMV board</title>
<updated>2025-01-16T07:55:27Z</updated>
<author>
<name>Junhui Liu</name>
<email>junhui.liu@pigmoral.tech</email>
</author>
<published>2025-01-14T16:46:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a1135b7526ab8cd7bfd6f2d650bfcce1c9808402'/>
<id>urn:sha1:a1135b7526ab8cd7bfd6f2d650bfcce1c9808402</id>
<content type='text'>
Add initial dts for K230-CanMV powered by Canaan Kendryte K230 SoC,
which has two RISC-V C908 cores, a big core with vector 1.0 extension
and a small core without vector extension.

This patch is basically comes from Linux Kernel [1] and it assumes
u-boot is running on the big core. Additionally, bootctl and reboot nodes
are added to support sysreset [2] and an clk_dummy node is added to
satisfy dependencies for usb [3].

Currently, u-boot is booted by the vendor's u-boot-spl. To meet the
requirements [4][5] of vendor's u-boot-spl for u-boot, a binman node with
mkimage child node is added here, which will compress u-boot.bin with
gzip and generate an image named "uboot" in the file u-boot-gz.img.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=k230-basic
[2] https://github.com/kendryte/k230_sdk/blob/v1.8/src/big/rt-smart/kernel/bsp/maix3/board/interdrv/sysctl/sysctl_boot/sysctl_boot.c#L67
[3] https://lore.kernel.org/linux-riscv/tencent_AD84B436C2F31108B66B4739D6E306C5E80A@qq.com/
[4] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan/common/k230_img.c#L306
[5] https://github.com/kendryte/k230_sdk/blob/v1.8/src/little/uboot/board/canaan/common/k230_img.c#L125

Signed-off-by: Junhui Liu &lt;junhui.liu@pigmoral.tech&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>riscv: spacemit: bananapi_f3: initial support added</title>
<updated>2024-12-18T05:19:16Z</updated>
<author>
<name>Kongyang Liu</name>
<email>seashell11234455@gmail.com</email>
</author>
<published>2024-12-15T05:02:41Z</published>
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<id>urn:sha1:1cd239f44438b96acf24a7425aae790cd3f91d66</id>
<content type='text'>
Add basic support for SpacemiT's Banana Pi F3 board.
Update the k1.dtsi align with mainline.
Note that the device tree files follow the mainline Linux source[1].

Links: https://patches.linaro.org/project/linux-serial/patch/20240730-k1-01-basic-dt-v5-8-98263aae83be@gentoo.org/ [1]

Signed-off-by: Kongyang Liu &lt;seashell11234455@gmail.com&gt;
Signed-off-by: Huan Zhou &lt;pericycle.cc@gmail.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
Reviewed-by: Yixun Lan &lt;dlan@gentoo.org&gt;
Tested-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
</content>
</entry>
<entry>
<title>dts: starfive: Switch to using upstream DT</title>
<updated>2024-12-18T05:19:15Z</updated>
<author>
<name>Hal Feng</name>
<email>hal.feng@starfivetech.com</email>
</author>
<published>2024-12-08T09:19:31Z</published>
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<id>urn:sha1:84d3911a01783ce386883a97fcc4157039793144</id>
<content type='text'>
Enable OF_UPSTREAM to use upstream DT and add starfive/ prefix to
the DEFAULT_DEVICE_TREE. Rename jh7110-starfive-visionfive-2-u-boot.dtsi
to jh7110-starfive-visionfive-2-v1.3b-u-boot.dtsi and set the v1.3b
device tree as the default device tree.

Drop redundant DT files from arch/riscv/dts/ and redundant clock and
reset definitions from include/dt-bindings/.

Since the old clock definitions is a little different from those in
upstream Linux, update the clock definitions in clock drivers
accordingly.

Tested-by: Anand Moon &lt;linux.amoon@gmail.com&gt;
Tested-by: E Shattow &lt;lucent@gmail.com&gt;
Acked-by: Sumit Garg &lt;sumit.garg@linaro.org&gt;
Signed-off-by: Hal Feng &lt;hal.feng@starfivetech.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: sophgo: add device tree for LicheeRV Nano</title>
<updated>2024-12-18T05:19:15Z</updated>
<author>
<name>Thomas Bonnefille</name>
<email>thomas.bonnefille@bootlin.com</email>
</author>
<published>2024-11-12T14:57:37Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4897de90c30d569630633241e7a1b80d4848ec21'/>
<id>urn:sha1:4897de90c30d569630633241e7a1b80d4848ec21</id>
<content type='text'>
Import a slightly modified version of the LicheeRV Nano and SG2002
device trees from the Linux Kernel. The current supported IPs are UART,
MMC, Timer, PLIC and CLINT.

Signed-off-by: Thomas Bonnefille &lt;thomas.bonnefille@bootlin.com&gt;
</content>
</entry>
<entry>
<title>riscv: Introduce configuration for 64bit version Microblaze V</title>
<updated>2024-11-06T11:42:54Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@amd.com</email>
</author>
<published>2024-11-01T09:50:45Z</published>
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<id>urn:sha1:d5f5e778183d5908caa2954b9438614252b806dd</id>
<content type='text'>
The commit 7576ab2facae ("riscv: Add support for AMD/Xilinx MicroBlaze V")
added support for 32bit version. 64bit version is also available that's why
wire it up too.
DT is providing description for generic QEMU target.

Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
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