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<title>u-boot.git/arch/riscv/dts, branch main</title>
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<updated>2026-08-05T18:13:19Z</updated>
<entry>
<title>board: sophgo: add support for Milk-V Duo 256M</title>
<updated>2026-08-05T18:13:19Z</updated>
<author>
<name>Hiago De Franco</name>
<email>hfranco@baylibre.com</email>
</author>
<published>2026-07-23T14:44:35Z</published>
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<id>urn:sha1:98b59e181daa6c26d49f870fd58df8996b1cd7f1</id>
<content type='text'>
Add U-Boot support for Milk-V Duo 256M.

This board has a different SoC compared to the Milk-V Duo 64M, it uses
the Sophgo SG2002 instead of the Sophgo CV1800B. Both SoCs share many
common IP blocks, so this board reuses the existing cv1800b CPU support.

The board shares the same 'board.c' with Milk-V Duo 64MB (CV1800B), so
use the same file for now.

Link: https://milkv.io/docs/duo/getting-started/duo256m
Signed-off-by: Hiago De Franco &lt;hfranco@baylibre.com&gt;
Acked-by: Leo Yu-Chi Liang &lt;leo.liang@sifive.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: cv18xx: fix spi node name</title>
<updated>2026-07-27T02:39:21Z</updated>
<author>
<name>Hiago De Franco</name>
<email>hfranco@baylibre.com</email>
</author>
<published>2026-04-30T19:35:18Z</published>
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<id>urn:sha1:40ea5423f9aaa5cc9c8364f96542a72e830113ce</id>
<content type='text'>
Fix warning:
arch/riscv/dts/cv18xx.dtsi:208.26-216.5: Warning (spi_bus_bridge):
/soc/spi-nor@10000000: node name for SPI buses should be 'spi'

Signed-off-by: Hiago De Franco &lt;hfranco@baylibre.com&gt;
</content>
</entry>
<entry>
<title>riscv: binman: Always set default configuration in FIT image</title>
<updated>2026-07-21T09:16:02Z</updated>
<author>
<name>Raymond Mao</name>
<email>raymond.mao@riscstar.com</email>
</author>
<published>2026-05-20T10:45:49Z</published>
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<id>urn:sha1:eb7de3ccf1a12467b701b65f8e46af74744ec935</id>
<content type='text'>
When CONFIG_MULTI_DTB_FIT is enabled, the FIT image contains multiple
device tree configurations for different boards. The default
configuration must be explicitly set to ensure the FIT framework
traverses all available configurations instead of falling back to
CONFIG_DEFAULT_DEVICE_TREE.

Without this default property, fit_find_config_node() will use
CONFIG_DEFAULT_DEVICE_TREE as the configuration name to match.
This prevents the SPL from correctly selecting the appropriate
DTB based on runtime board detection (e.g., from EEPROM).

Remove the conditional guard so that "default = conf-1" is always
present in the FIT image, regardless of CONFIG_MULTI_DTB_FIT.

Signed-off-by: Raymond Mao &lt;raymond.mao@riscstar.com&gt;
Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
</content>
</entry>
<entry>
<title>spl: k1: enable SPI NOR flash detection and boot</title>
<updated>2026-07-21T09:16:01Z</updated>
<author>
<name>Guodong Xu</name>
<email>guodong@riscstar.com</email>
</author>
<published>2026-05-20T10:45:48Z</published>
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<id>urn:sha1:e63500cab0c04012a92f0e870339316408e2f7cf</id>
<content type='text'>
Add nor_early_init() to probe the QSPI controller and SPI NOR flash
in SPL.  Switch spl_boot_device() to BOOT_DEVICE_SPI so the board
boots from SPI flash.

Change the default device tree to k1-musepi-pro, whose u-boot
overlay already defines the QSPI controller and flash node with
bootph-pre-ram markers.  Enable the required SPI driver model and
flash config options.

Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
</content>
</entry>
<entry>
<title>board: k1: enable pmic in spl</title>
<updated>2026-07-21T09:12:53Z</updated>
<author>
<name>Raymond Mao</name>
<email>raymond.mao@riscstar.com</email>
</author>
<published>2026-06-30T01:19:14Z</published>
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<id>urn:sha1:80aa3d316060a30777842c79d032376d425424d6</id>
<content type='text'>
Add Spacemit P1 SoC support in SPL. And set the default voltage
for BUCKs and LDOs.

Also update MAINTAINERS: add Guodong Xu as co-maintainer, list the
u-boot-spacemit mailing list, register the new K1 driver files (i2c,
PMIC, regulator), and fix a pre-existing '@@' typo in Huan Zhou's
email.

Fixes: 1cd239f44438 ("riscv: spacemit: bananapi_f3: initial support added")
Signed-off-by: Raymond Mao &lt;raymond.mao@riscstar.com&gt;
Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Tested-by: Songsong Zhang &lt;sszhang@vsit.ai&gt;
</content>
</entry>
<entry>
<title>spacemit: k1: Add DDR firmware support to SPL</title>
<updated>2026-07-21T08:57:14Z</updated>
<author>
<name>Raymond Mao</name>
<email>raymond.mao@riscstar.com</email>
</author>
<published>2026-06-30T01:19:11Z</published>
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<id>urn:sha1:83026cf8f90b04ff02eede32cd646c2e961ccdbf</id>
<content type='text'>
Include DDR initialization firmware in the SPL image. The firmware
path can be specified via the DDR_FW_FILE environment variable. If
the firmware is not found, an empty placeholder file is created to
allow the build to proceed without DDR initialization support.

Signed-off-by: Raymond Mao &lt;raymond.mao@riscstar.com&gt;
Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Tested-by: Songsong Zhang &lt;sszhang@vsit.ai&gt;
</content>
</entry>
<entry>
<title>spacemit: k1: add TLV EEPROM support in SPL</title>
<updated>2026-07-21T08:57:13Z</updated>
<author>
<name>Raymond Mao</name>
<email>raymond.mao@riscstar.com</email>
</author>
<published>2026-06-30T01:19:10Z</published>
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<id>urn:sha1:b3ec88a7f391e57b1b5d67144844d34ac03fe1c3</id>
<content type='text'>
And support for required components including clock, I2C controller,
and I2C EEPROM.

Signed-off-by: Raymond Mao &lt;raymond.mao@riscstar.com&gt;
Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Tested-by: Songsong Zhang &lt;sszhang@vsit.ai&gt;
</content>
</entry>
<entry>
<title>dts: k1: enable clocks in SPL</title>
<updated>2026-07-21T08:57:13Z</updated>
<author>
<name>Raymond Mao</name>
<email>raymond.mao@riscstar.com</email>
</author>
<published>2026-06-30T01:19:07Z</published>
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<id>urn:sha1:70cee8ab03c3252d17cb0c10bfe80cbda7ef4bb9</id>
<content type='text'>
Make the K1 clock controllers visible to SPL by tagging the four root
fixed clocks (osc_32k, vctcxo_{1,3,24}m) and the four syscon nodes
(mpmu, pll, apmu, apbc) with bootph-pre-ram in the BPI-F3 U-Boot
overlay.

Signed-off-by: Raymond Mao &lt;raymond.mao@riscstar.com&gt;
Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Tested-by: Songsong Zhang &lt;sszhang@vsit.ai&gt;
</content>
</entry>
<entry>
<title>spacemit: k1: enable SPL with debug UART</title>
<updated>2026-07-21T08:57:13Z</updated>
<author>
<name>Raymond Mao</name>
<email>raymond.mao@riscstar.com</email>
</author>
<published>2026-06-30T01:19:03Z</published>
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<id>urn:sha1:ae94d8af7fb1bcbaa98f82995da4c80a4cb74aac</id>
<content type='text'>
Add SPL support featuring debug UART output for early boot
diagnostics on K1 SoC.

Signed-off-by: Raymond Mao &lt;raymond.mao@riscstar.com&gt;
Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
Tested-by: Songsong Zhang &lt;sszhang@vsit.ai&gt;
</content>
</entry>
<entry>
<title>dts: k1: drop legacy local DT files</title>
<updated>2026-07-21T08:31:10Z</updated>
<author>
<name>Guodong Xu</name>
<email>guodong@riscstar.com</email>
</author>
<published>2026-05-27T02:45:46Z</published>
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<id>urn:sha1:82e21b9322fabd9c82367e9abbfa6b0ed8a2151d</id>
<content type='text'>
The K1 build now consumes the kernel device tree via OF_UPSTREAM. The
local copies under arch/riscv/dts/ (k1.dtsi, k1-pinctrl.dtsi,
k1-bananapi-f3.dts) are unreachable; remove them.

Signed-off-by: Guodong Xu &lt;guodong@riscstar.com&gt;
</content>
</entry>
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