u-boot.git/arch/riscv/include/asm/arch-fu540, branch master

board: sifive: Rename spl_soc_init() to spl_dram_init()

2024-05-01T16:01:18Z

Rename spl_soc_init() to spl_dram_init() because the generic function name does not reflect what the function actually does. Also spl_dram_init() is commonly used for dram initialization and should be called from board_init_f(). Signed-off-by: Lukas Funke Reviewed-by: Leo Yu-Chi Liang

board: sifive: use ccache driver instead of helper function

2021-09-07T02:34:29Z

Invokes the common cache_init function to initialize ccache. Signed-off-by: Zong Li Reviewed-by: Sean Anderson Reviewed-by: Rick Chen

dm: treewide: Rename ..._platdata variables to just ..._plat

2020-12-13T23:51:09Z

Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass

riscv: sifive/fu540: spl: Rename soc_spl_init()

2020-08-14T06:38:53Z

spl_soc_init() seems to be a better name, as all SPL functions names start from the spl_ prefix. Signed-off-by: Bin Meng Reviewed-by: Rick Chen Reviewed-by: Pragnesh Patel Tested-by: Pragnesh Patel

sifive: reset: add DM based reset driver for SiFive SoC's

2020-08-04T01:19:41Z

PRCI module within SiFive SoC's has register with which we can reset the sub-systems within the SoC. The resets to DDR and ethernet sub systems within FU540-C000 SoC are active low, and are hold low by default on power-up. Currently these are directly asserted within prci driver via register read/write. With the DM based reset driver support here, we bind the reset driver with clock (prci) driver and assert the reset signals of both sub-system's appropriately. Signed-off-by: Sagar Shrikant Kadam Reviewed-by: Pragnesh Patel Reviewed-by: Bin Meng Tested-by: Bin Meng

riscv: sifive: fu540: enable all cache ways from U-Boot proper

2020-07-03T07:09:06Z

Add L2 cache node to enable all cache ways from U-Boot proper. Signed-off-by: Pragnesh Patel Reviewed-by: Bin Meng Tested-by: Bin Meng

riscv: sifive: fu540: add SPL configuration

2020-06-04T01:44:09Z

Add a support for SPL which will boot from L2 LIM (0x0800_0000) and then SPL will boot U-Boot FIT image (OpenSBI FW_DYNAMIC + u-boot.bin) from MMC boot devices. SPL related code is leveraged from FSBL (https://github.com/sifive/freedom-u540-c000-bootloader.git) Signed-off-by: Pragnesh Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Jagan Teki Tested-by: Jagan Teki

riscv: cpu: fu540: Add support for cpu fu540

2020-06-04T01:44:09Z

Add SiFive fu540 cpu to support RISC-V arch Signed-off-by: Pragnesh Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Jagan Teki Tested-by: Jagan Teki