u-boot.git/arch/riscv/include/asm/syscon.h, branch v2020.01

riscv: Add a SYSCON driver for Andestech's PLMT

2019-04-08T01:45:08Z

The platform-Level Machine Timer (PLMT) block holds memory-mapped mtime register associated with timer tick. This driver implements the riscv_get_time() which is required by the generic RISC-V timer driver. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng Reviewed-by: Lukas Auer

riscv: Add a SYSCON driver for Andestech's PLIC

2019-04-08T01:45:08Z

The Platform-Level Interrupt Controller (PLIC) block holds memory-mapped claim and pending registers associated with software interrupt. It is required for handling IPI. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Bin Meng Reviewed-by: Lukas Auer

riscv: Add a SYSCON driver for SiFive's Core Local Interruptor

2018-12-18T01:56:26Z

This adds U-Boot syscon driver for SiFive's Core Local Interruptor (CLINT). The CLINT block holds memory-mapped control and status registers associated with software and timer interrupts. This driver implements the riscv_get_time() API as required by the generic RISC-V timer driver, as well as some other APIs that are needed for handling IPI. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer Reviewed-by: Anup Patel