u-boot.git/arch/riscv, branch master Unnamed repository; edit this file 'description' to name the repository. Merge patch series "bootm: Clean up arch-specific, pre-OS clean-up" 2026-03-19T00:36:50+00:00 Tom Rini trini@konsulko.com 2026-03-19T00:36:50+00:00 eb00c710508d09b2a3b9aca75dd18280f1304703 Simon Glass <sjg@chromium.org> says: Each arch does something slightly different before booting the OS. Some archs even do different things depending on the CPU type. It is quite hard to know what actually happens in the final milliseconds before the OS boot. This series attempts to start cleaning up U-Boot in this area. The basic intent is to create a new bootm_final() function which can be called by all archs. It provides some flags for a couple of necessary variations but otherwise it is generic. All architectures are converted over to use this new function. board_quiesce_devices() is moved into bootm_final() so that all archs benefit from it. This series fixes a bug in device_remove() is fixed where removing a parent with specialised flags (e.g. DM_REMOVE_ACTIVE_ALL) could leave children activated, since they do not match the flags. This fixes is needed to avoid bootm_final() causing test failures on sandbox. Future work could take this a little further: - Convert EFI loader to use the same function - Improve comments for cleanup_before_linux() across architectures - Support fake-run tracing on all archs Link: https://lore.kernel.org/r/20260306023638.2678886-1-sjg@chromium.org 
Simon Glass <sjg@chromium.org> says:

Each arch does something slightly different before booting the OS. Some
archs even do different things depending on the CPU type.

It is quite hard to know what actually happens in the final milliseconds
before the OS boot.

This series attempts to start cleaning up U-Boot in this area.

The basic intent is to create a new bootm_final() function which can be
called by all archs. It provides some flags for a couple of necessary
variations but otherwise it is generic.

All architectures are converted over to use this new function.

board_quiesce_devices() is moved into bootm_final() so that all archs
benefit from it.

This series fixes a bug in device_remove() is fixed where removing a
parent with specialised flags (e.g. DM_REMOVE_ACTIVE_ALL) could leave
children activated, since they do not match the flags. This fixes is
needed to avoid bootm_final() causing test failures on sandbox.

Future work could take this a little further:
- Convert EFI loader to use the same function
- Improve comments for cleanup_before_linux() across architectures
- Support fake-run tracing on all archs

Link: https://lore.kernel.org/r/20260306023638.2678886-1-sjg@chromium.org
riscv: Call bootm_final() 2026-03-18T19:17:34+00:00 Simon Glass simon.glass@canonical.com 2026-03-06T02:36:15+00:00 aa5ada5447369849c82310073270ed64df1efd9b The RISC-V announce_and_cleanup() duplicates the common pre-boot steps. Replace it with a call to bootm_final(). Move board_quiesce_devices() into bootm_final() so it is available to all architectures. Drop the RISC-V weak definition and header declaration since the generic one in bootm.h is used instead. Signed-off-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Tom Rini <trini@konsulko.com> 
The RISC-V announce_and_cleanup() duplicates the common pre-boot
steps. Replace it with a call to bootm_final().

Move board_quiesce_devices() into bootm_final() so it is available to
all architectures. Drop the RISC-V weak definition and header
declaration since the generic one in bootm.h is used instead.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
riscv: Add support for BeagleV-Fire 2026-03-17T03:39:18+00:00 Jamie Gibbons jamie.gibbons@microchip.com 2026-01-16T14:08:30+00:00 b51e59c8b34c780e28728bc0cb58783855c7ffbf Bring U-Boot support for the BeagleV-Fire by adding a device tree and supporting board files etc. Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
Bring U-Boot support for the BeagleV-Fire by adding a device tree and
supporting board files etc.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
eeprom: starfive: Correct get_pcb_revision_from_eeprom() 2026-03-16T17:36:57+00:00 Hal Feng hal.feng@starfivetech.com 2025-10-24T08:59:27+00:00 78253aeeecdfea4c71779905ff2b400fa7400b1c pcb_revision is stored in the pcb_revision field of ATOM4. Correct it. Move the function description to the header file. Return 0 instead of 0xFF if read_eeprom() fails. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Fixes: aea1bd95b61e ("eeprom: starfive: Enable ID EEPROM configuration") Signed-off-by: Hal Feng <hal.feng@starfivetech.com> 
pcb_revision is stored in the pcb_revision field of ATOM4. Correct it.
Move the function description to the header file.
Return 0 instead of 0xFF if read_eeprom() fails.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: aea1bd95b61e ("eeprom: starfive: Enable ID EEPROM configuration")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
eeprom: starfive: Simplify get_ddr_size_from_eeprom() 2026-03-16T17:36:57+00:00 Hal Feng hal.feng@starfivetech.com 2025-10-24T08:59:26+00:00 6015c98be50f2fc571c294d2f2b0768212fb7e99 Directly return the DDR size instead of the field of 'DxxxExxx'. Move the function description to the header file. Return 0 instead of 0xFF if read_eeprom() fails. Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Fixes: aea1bd95b61e ("eeprom: starfive: Enable ID EEPROM configuration") Signed-off-by: Hal Feng <hal.feng@starfivetech.com> 
Directly return the DDR size instead of the field of 'DxxxExxx'.
Move the function description to the header file.
Return 0 instead of 0xFF if read_eeprom() fails.

Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Fixes: aea1bd95b61e ("eeprom: starfive: Enable ID EEPROM configuration")
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
riscv: mpfs: SIFIVE_CLINT and SPL_SIFIVE_CLINT don't exist 2026-03-12T18:57:58+00:00 Heinrich Schuchardt heinrich.schuchardt@canonical.com 2026-02-25T17:52:29+00:00 12a9c83cba29b0acf3d41fb40de6416c473c0ba3 Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT. MPFS boards neither use SPL nor do they run main U-Boot in M-mode. So we don't need CONFIG_(SPL_)ACLINT either. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> 
Don't imply non-existent symbols CONFIG_SIFIVE_CLINT and SPL_SIFIVE_CLINT.

MPFS boards neither use SPL nor do they run main U-Boot in M-mode.
So we don't need CONFIG_(SPL_)ACLINT either.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
driver: cache: Remove SiFive PL2 driver 2026-03-12T18:57:15+00:00 Nick Hu nick.hu@sifive.com 2026-01-19T05:55:23+00:00 61e2430360a592040357ab6a7241c29666b11e28 Under single core boot platform, the secondary cores won't enter the u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi. Signed-off-by: Nick Hu <nick.hu@sifive.com> Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
Under single core boot platform, the secondary cores won't enter the
u-boot spl. Therefore we move the pl2 driver from u-boot to the Opensbi.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Signed-off-by: Jimmy Ho <jimmy.ho@sifive.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
sifive: switch to OF_UPSTREAM 2026-03-12T18:56:52+00:00 Andreas Schwab schwab@suse.de 2026-01-28T16:51:02+00:00 4dcff3b572a1d67c35b7ed71253a6d85aefe4e9b Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot. Signed-off-by: Andreas Schwab <schwab@suse.de> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 
Tested on HiFive Unleashed and HiFive Unmatched, both SPIFlash and MMC boot.

Signed-off-by: Andreas Schwab <schwab@suse.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
treewide: Clean up DECLARE_GLOBAL_DATA_PTR usage 2026-02-17T19:50:22+00:00 Peng Fan peng.fan@nxp.com 2026-02-09T01:30:18+00:00 0f90b1e715f8abe41b0875752eb184f46032ff11 Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and drop the unnecessary inclusion of asm/global_data.h. Headers should be included directly by the files that need them, rather than indirectly via global_data.h. Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> #STMicroelectronics boards and STM32MP1 ram test driver Tested-by: Anshul Dalal <anshuld@ti.com> #TI boards Acked-by: Yao Zi <me@ziyao.cc> #TH1520 Signed-off-by: Peng Fan <peng.fan@nxp.com> 
Remove DECLARE_GLOBAL_DATA_PTR from files where gd is not used, and
drop the unnecessary inclusion of asm/global_data.h.

Headers should be included directly by the files that need them,
rather than indirectly via global_data.h.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> #STMicroelectronics boards and STM32MP1 ram test driver
Tested-by: Anshul Dalal <anshuld@ti.com> #TI boards
Acked-by: Yao Zi <me@ziyao.cc> #TH1520
Signed-off-by: Peng Fan <peng.fan@nxp.com>
riscv: Update linker scripts to ensure appended device tree is aligned 2026-01-20T18:07:21+00:00 Tom Rini trini@konsulko.com 2026-01-15T22:19:38+00:00 f150843499b3139c2358f5659411571399902d4a With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+: Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains that we must have ALIGN(x) statements inside of a section to ensure that padding is included and not simply that the linker address counter is incremented. To that end, this patch: - Aligns the final section before _end (for U-Boot) or _image_binary_end (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final section before the symbol. - Remove a now-spurious '. = ALIGN(x);' statement that was intended to provide the above alignments. - Ensure that we do have alignment by adding an ASSERT so that when not aligned we fail to link (and explain why). Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Tom Rini <trini@konsulko.com> 
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version
v1.7.2-35-g52f07dcca47c") it is now a fatal error to U-Boot if our
device tree is not 8-byte aligned. In commit 85f586035d75 ("ARM: OMAP2+:
Pad SPL binary to 8-byte alignment before DTB") Beleswar Padhi explains
that we must have ALIGN(x) statements inside of a section to ensure that
padding is included and not simply that the linker address counter is
incremented. To that end, this patch:
- Aligns the final section before _end (for U-Boot) or _image_binary_end
  (for xPL phases) by 8-bytes by adding '. = ALIGN(8);' to the final
  section before the symbol.
- Remove a now-spurious  '. = ALIGN(x);' statement that was intended to
  provide the above alignments.
- Ensure that we do have alignment by adding an ASSERT so that when not
  aligned we fail to link (and explain why).

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>