<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/sandbox/include, branch v2026.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2025-10-10T19:58:49Z</updated>
<entry>
<title>sandbox: Rework readX/writeX macros to be more like ARM</title>
<updated>2025-10-10T19:58:49Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-10-01T20:30:35Z</published>
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<id>urn:sha1:b30155c08e95550296668766bfd7d3da27c970fe</id>
<content type='text'>
The way that the current readX/writeX macros are implemented on sandbox
means that when IO_TRACE is not enabled some code will throw up
incorrect warnings due to how sandbox_{read,write} is implemented. We
instead need to do the "uX __v; __v = sandbox..(..v); __v;" trick that
ARM does.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>sandbox: Add generic asm/atomic.h</title>
<updated>2025-08-19T17:25:28Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-08-12T17:59:08Z</published>
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<id>urn:sha1:66ff673a8e9f56d2c08a32d12867094c77ea5fd3</id>
<content type='text'>
In order to compile code that uses &lt;asm/atomic.h&gt; on sandbox, we must
provide this header. RISC-V shows us today how to do so with the generic
header implementation, so copy that.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>sandbox: Improve dummy local_irq_save implementation</title>
<updated>2025-08-19T17:25:28Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-08-12T17:59:07Z</published>
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<id>urn:sha1:58998fed9e63e8310a96229565d2996ad29d191e</id>
<content type='text'>
Normally, local_save_flags is used as part of the local_irq_* macros, so
remove that as it's unused. Make local_irq_save do something to the
passed variable so that it won't trigger unused variable warnings later.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>sandbox: Add an additional dummy sync macro</title>
<updated>2025-08-14T16:58:43Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-08-04T21:50:08Z</published>
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<id>urn:sha1:d68db76b95b106227a40fcf41ebf4dccb2225a0e</id>
<content type='text'>
There are some drivers which call a "dmb" for a type of sync. Add that
as well to sandbox.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>sandbox: Add more dummy functions to mimic other architectures</title>
<updated>2025-08-11T21:11:19Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-18T01:15:52Z</published>
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<id>urn:sha1:493c3da3ac530229ca4c4caadd5df041f6c25eb2</id>
<content type='text'>
This adds more common functions found on other architectures that will
allow for more compile-testing of drivers. These are either dummy
functions as we do not need them or mappings to existing functions,
similar to how other architectures handle it.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>sandbox: Add dummy sync()</title>
<updated>2025-07-18T18:22:11Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-11T15:20:16Z</published>
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<id>urn:sha1:786e1f6dea07126b0265fcb6e8f5010d8d3e0e40</id>
<content type='text'>
In order to compile more drivers, add an empty sync() function.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>sandbox: Add some missing {clr,set,clrset}bits variants</title>
<updated>2025-07-10T14:40:47Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-01T18:42:57Z</published>
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<id>urn:sha1:7faaa16a471b0b611685dd3872a057f1cb286262</id>
<content type='text'>
Add the 16, 32 and 64bit versions of the non-endian {clr,set,clrset}bits
macros.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>sandbox: align LMB memory</title>
<updated>2025-06-26T19:45:33Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2025-06-08T07:54:27Z</published>
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<id>urn:sha1:5c8de1bcfb0024993d902fb5dcfe87546116799b</id>
<content type='text'>
To implement the EFI_SYSTEM_TABLE_POINTER we need 4 MiB aligned
memory.

On the sandbox LMB uses addresses relative to the start of a page aligned
RAM buffer allocated with mmap(). This leads to a mismatch of alignment
between EFI which uses pointers and LMB which uses phys_addr_t.

Ensure that the RAM buffer used for LMB is 4 MiB aligned.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
</content>
</entry>
<entry>
<title>imx9: scmi: add i.MX95 SoC and clock related code</title>
<updated>2025-05-03T19:55:32Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2025-04-28T10:37:34Z</published>
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<id>urn:sha1:0bd99a1dd2d3b647c82b6b04891f389b3e7799e5</id>
<content type='text'>
This patch adds i.MX95 SoC and clock related code. Because they are
based on SCMI, put them in the scmi subfolder.

Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
Signed-off-by: Frank Li &lt;Frank.Li@nxp.com&gt;
Signed-off-by: Ji Luo &lt;ji.luo@nxp.com&gt;
Signed-off-by: Jindong Yue &lt;jindong.yue@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ranjani Vaidyanathan &lt;ranjani.vaidyanathan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
</content>
</entry>
<entry>
<title>sandbox: add SCMI clock control permissions to sandbox</title>
<updated>2025-05-03T19:55:32Z</updated>
<author>
<name>Alice Guo</name>
<email>alice.guo@nxp.com</email>
</author>
<published>2025-04-28T10:37:32Z</published>
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<id>urn:sha1:ced74d88b26d7ce9b04104c8036eef3066d3603a</id>
<content type='text'>
This patch is used to add SCMI clock control permissions to sandbox for
testing.

Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
</content>
</entry>
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