u-boot.git/arch/x86/cpu/coreboot/coreboot.c, branch v2018.01

x86: kconfig: Select ARCH_MISC_INIT in the platform Kconfig

2017-08-01T12:17:02Z

arch_misc_init() is intended to do architecture-dependent stuff. This is required by each platform. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: kconfig: Let board select BOARD_EARLY_INIT_F

2017-08-01T12:17:02Z

CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes and should be not 'default y' for all x86 boards. Signed-off-by: Bin Meng Reviewed-by: Andy Shevchenko Reviewed-by: Simon Glass

board_f: x86: Use checkcpu() for CPU init

2017-04-05T17:55:09Z

At present we misuse print_cpuinfo() do so CPU init on x86. This is done because it is the next available call after the console is enabled. But several arches use checkcpu() instead. Despite the horrible name (which we can fix), it seems a better choice. Adjust the various x86 CPU implementations to move their init code into checkcpu() and use print_cpuinfo() only for printing CPU info. Signed-off-by: Simon Glass Reviewed-by: Stefan Roese

x86: Call board_final_cleanup() in last_stage_init()

2016-05-23T07:18:00Z

At present board_final_cleanup() is called before booting a Linux kernel. This actually needs to be done before booting anything, like SeaBIOS, VxWorks or Windows. Move the call to last_stage_init() instead. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: coreboot: Convert to use more dm drivers

2015-09-09T13:48:03Z

Move to driver model for RTC, USB and ETH on coreboot. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: qemu: Implement PIRQ routing

2015-06-04T09:03:18Z

Support QEMU PIRQ routing via device tree on both i440fx and q35 platforms. With this commit, Linux booting on QEMU from U-Boot has working ATA/SATA, USB and ethernet. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: coreboot: Control I/O port 0xb2 writing via device tree

2015-06-04T09:03:18Z

Writing 0xcb to I/O port 0xb2 (Advanced Power Management Control) causes U-Boot to hang on QEMU q35 target. We introduce a config option in the device tree "u-boot,no-apm-finalize" under /config node if we don't want to do that. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: coreboot: Fix cosmetic issues

2015-06-04T09:03:17Z

Clean up arch/x86/cpu/coreboot.c to fix several cosmetic issues. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: config: Enable hook for saving MRC configuration

2015-01-24T13:13:45Z

Add a hook to ensure that this information is saved. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Add support for MTRRs

2015-01-13T15:25:00Z

Memory Type Range Registers are used to tell the CPU whether memory is cacheable and if so the cache write mode to use. Clean up the existing header file to follow style, and remove the unneeded code. These can speed up booting so should be supported. Add these to global_data so they can be requested while booting. We will apply the changes during relocation (in a later commit). Signed-off-by: Simon Glass