u-boot.git/arch/x86/cpu/coreboot, branch v2016.09

x86: coreboot: Remove the dummy pch driver

2016-06-29T02:08:15Z

There is a dummy pch driver in the coreboot directory. This causes drivers of its children fail to function due to empty ops. Remove the whole file since it is no longer needed. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: Call board_final_cleanup() in last_stage_init()

2016-05-23T07:18:00Z

At present board_final_cleanup() is called before booting a Linux kernel. This actually needs to be done before booting anything, like SeaBIOS, VxWorks or Windows. Move the call to last_stage_init() instead. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: Move asm/arch-coreboot/tables.h to a common place

2016-03-17T02:27:21Z

Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that coreboot table definitions can be used by other x86 builds. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

dm: x86: spi: Convert ICH SPI driver to driver model PCI API

2016-01-24T04:07:17Z

At present this SPI driver works by searching the PCI buses for its peripheral. It also uses the legacy PCI API. In addition the driver has code to determine the type of Intel PCH that is used (version 7 or version 9). Now that we have proper PCH drivers we can use those to obtain the information we need. While the device tree has a node for the SPI peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the LPC device. Update the device tree files to show the SPI controller within the PCH, so that PCI access works as expected. This patch includes Bin's fix-up patch from here: https://patchwork.ozlabs.org/patch/569478/ Signed-off-by: Simon Glass Signed-off-by: Bin Meng Reviewed-by: Bin Meng Tested-by: Bin Meng

x86: Convert to use driver model timer

2015-12-01T13:26:35Z

Convert all x86 boards to use driver model tsc timer. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: coreboot: Convert to use more dm drivers

2015-09-09T13:48:03Z

Move to driver model for RTC, USB and ETH on coreboot. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: coreboot: Allow >=4GiB memory bank size

2015-08-26T14:54:07Z

Some platforms may have >=4GiB memory, so we need make U-Boot report such configuration correctly when booting as the coreboot payload. Signed-off-by: Bin Meng

x86: Remove calculate_relocation_address()

2015-08-26T14:54:07Z

Now that we have generic routine to calculate relocation address, remove the x86 specific one which is now only used by coreboot. Signed-off-by: Bin Meng

x86: coreboot: Correctly report E820 types

2015-08-26T14:54:07Z

coreboot has some extensions (type 6 & 16) to the E820 types. When we detect this, mark it as E820_RESERVED. Signed-off-by: Bin Meng

x86: pci: Tidy up the generic x86 PCI driver

2015-07-15T00:03:19Z

This driver should use the x86 PCI configuration functions. Also adjust its compatible string to something generic (i.e. without a vendor name). Signed-off-by: Simon Glass Reviewed-by: Bin Meng