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<title>u-boot.git/arch/x86/cpu/coreboot, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu/coreboot?h=v2017.07</id>
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<updated>2017-04-30T17:40:57Z</updated>
<entry>
<title>fs: Kconfig: Add a separate config for FS_CBFS</title>
<updated>2017-04-30T17:40:57Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-04-27T04:27:59Z</published>
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<id>urn:sha1:deb959991528bee05079426c189f538ad3850337</id>
<content type='text'>
Rather than using CMD_CBFS for both the filesystem and its command, we
should have a separate option for each. This allows us to enable CBFS
support without the command, if desired, which reduces U-Boot's size
slightly.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: imply FS_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>fs: Convert CONFIG_CMD_CBFS to Kconfig</title>
<updated>2017-04-30T17:40:56Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-04-27T04:27:58Z</published>
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<id>urn:sha1:d66a10fc00407fda3c5091ca38c090dc055f7953</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_CMD_CBFS

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: imply CMD_CBFS on SYS_COREBOOT]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>board_f: Drop setup_dram_config() wrapper</title>
<updated>2017-04-05T20:36:51Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-31T14:40:32Z</published>
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<id>urn:sha1:76b00aca4f1c13bc8f91a539e612abc70d0c692f</id>
<content type='text'>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>board_f: x86: Use checkcpu() for CPU init</title>
<updated>2017-04-05T17:55:09Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-28T16:27:30Z</published>
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<id>urn:sha1:76d1d02fd280ef7ad63a97c3a80bd765bf5596fa</id>
<content type='text'>
At present we misuse print_cpuinfo() do so CPU init on x86. This is done
because it is the next available call after the console is enabled. But
several arches use checkcpu() instead. Despite the horrible name (which
we can fix), it seems a better choice.

Adjust the various x86 CPU implementations to move their init code into
checkcpu() and use print_cpuinfo() only for printing CPU info.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: coreboot: Convert to use DM coreboot video driver</title>
<updated>2016-10-12T02:58:24Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-10-09T11:14:18Z</published>
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<id>urn:sha1:2d3c573ee6373f4521491f1a38e81245c3a6be57</id>
<content type='text'>
This converts coreboot to use DM framebuffer driver.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: coreboot: Remove the dummy pch driver</title>
<updated>2016-06-29T02:08:15Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-06-22T09:30:03Z</published>
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<id>urn:sha1:ff6e1569663eccaf9e582c57cc44568915c2f54b</id>
<content type='text'>
There is a dummy pch driver in the coreboot directory. This causes
drivers of its children fail to function due to empty ops. Remove
the whole file since it is no longer needed.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Call board_final_cleanup() in last_stage_init()</title>
<updated>2016-05-23T07:18:00Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-05-11T14:44:56Z</published>
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<id>urn:sha1:1e2f7b9e8e077cb6937204c305d554ef7a970be5</id>
<content type='text'>
At present board_final_cleanup() is called before booting a Linux
kernel. This actually needs to be done before booting anything,
like SeaBIOS, VxWorks or Windows.

Move the call to last_stage_init() instead.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Move asm/arch-coreboot/tables.h to a common place</title>
<updated>2016-03-17T02:27:21Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2016-02-28T06:57:55Z</published>
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<id>urn:sha1:f1d6fda6d3ed0f397afebf715d9540e8666f1596</id>
<content type='text'>
Move asm/arch-coreboot/tables.h to asm/coreboot_tables.h so that
coreboot table definitions can be used by other x86 builds.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: x86: spi: Convert ICH SPI driver to driver model PCI API</title>
<updated>2016-01-24T04:07:17Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-01-19T03:19:21Z</published>
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<id>urn:sha1:f2b85ab5e6a91e29c1d64304be371753d75ed172</id>
<content type='text'>
At present this SPI driver works by searching the PCI buses for its
peripheral. It also uses the legacy PCI API.

In addition the driver has code to determine the type of Intel PCH that is
used (version 7 or version 9). Now that we have proper PCH drivers we can
use those to obtain the information we need.

While the device tree has a node for the SPI peripheral it is not in the
right place. It should be on the PCI bus as a sub-peripheral of the LPC
device.

Update the device tree files to show the SPI controller within the PCH, so
that PCI access works as expected.

This patch includes Bin's fix-up patch from here:

   https://patchwork.ozlabs.org/patch/569478/

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Convert to use driver model timer</title>
<updated>2015-12-01T13:26:35Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-13T08:11:22Z</published>
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<id>urn:sha1:80af39842e64a44258ab5eb913659e29fc319903</id>
<content type='text'>
Convert all x86 boards to use driver model tsc timer.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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