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<title>u-boot.git/arch/x86/cpu/cpu.c, branch v2015.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu/cpu.c?h=v2015.07</id>
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<updated>2015-04-30T22:13:48Z</updated>
<entry>
<title>x86: Allow CPUs to be set up after relocation</title>
<updated>2015-04-30T22:13:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-04-30T04:26:01Z</published>
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<id>urn:sha1:bcb0c61e1a7f2a418e986044a9ade06561f8f8a8</id>
<content type='text'>
This permits init of additional CPU cores after relocation and when driver
model is ready.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Store the GDT pointer in global_data</title>
<updated>2015-04-30T03:02:34Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-04-29T02:25:15Z</published>
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<id>urn:sha1:52845296be8190c3f581090d6336fa033f2bd2d8</id>
<content type='text'>
When we start up additional CPUs we want them to use the same Global
Descriptor Table. Store the address of this in global_data so we can
reference it later.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Implement reset_cpu() correctly for modern CPUs</title>
<updated>2015-04-30T03:02:31Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-04-29T02:11:29Z</published>
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<id>urn:sha1:ff6a8f3c06eab0f0afb65d5e5925eee9860f0add</id>
<content type='text'>
The existing code is pretty ancient and is unreliable on modern hardware.
Generally it will hang.

We can use port 0xcf9 to initiate reset on more modern hardware (say in the
last 10 years). Update the reset_cpu() function to do this, and add a new
'full reset' function to perform a full power cycle.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Write configuration tables in last_stage_init()</title>
<updated>2015-04-30T00:51:49Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-04-24T10:10:04Z</published>
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<id>urn:sha1:5e2400e8f873a1b7ee840554e4157c5f7900a863</id>
<content type='text'>
We can write the configuration table in last_stage_init() for all x86
boards, but not with coreboot since coreboot already has them.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Kconfig: Move CONFIG_BOOTSTAGE to Kconfig</title>
<updated>2015-04-18T17:11:37Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-03-03T00:04:37Z</published>
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<id>urn:sha1:ee2b24340fd1d63a27ac4ed6ac828ade1469dbe7</id>
<content type='text'>
Move CONFIG_BOOT_STAGE and its associated options to Kconfig. Adjust
existing users and code.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Save mtrr support flag in global data</title>
<updated>2015-01-24T00:24:55Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-01-22T03:29:40Z</published>
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<id>urn:sha1:49491669065c1c718d8dc0b0ebc151b3d010c17b</id>
<content type='text'>
CPUID (EAX 01H) returns MTRR support flag in EDX bit 12. Probe this
flag in x86_cpu_init_f() and save it in global data.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add GDT descriptors for option ROMs</title>
<updated>2014-11-25T13:34:14Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T03:56:29Z</published>
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<id>urn:sha1:e34aef1de36893250a788a272b6242e46da31b86</id>
<content type='text'>
Option ROMs require a few additional descriptors. Add these, and remove the
enum since we now have to access several descriptors from assembler.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Remove cpu_init_r() for x86</title>
<updated>2014-11-25T13:34:02Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2014-11-20T08:11:00Z</published>
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<id>urn:sha1:a549f7497b4d719d37e4a20378c81c1b29bf0404</id>
<content type='text'>
Since cpu_init_interrupts() was moved out of cpu_init_r(), it is
useless to keep cpu_init_r() for x86, thus remove it.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Call cpu_init_interrupts() from interrupt_init()</title>
<updated>2014-11-25T13:34:02Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2014-11-20T08:10:49Z</published>
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<id>urn:sha1:4372a9eca5561ec21277b616b5223cf23ab526ca</id>
<content type='text'>
Currently cpu_init_interrupts() is called from cpu_init_r() to
setup the interrupt and exception of the cpu core, but at that
time the i8259 has not been initialized to mask all the irqs
and remap the master i8259 interrupt vector base, so the whole
system is at risk of being interrupted, and if interrupted,
wrong interrupt/exception message is shown.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Make show_boot_progress() common</title>
<updated>2014-11-21T06:34:15Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-13T05:42:26Z</published>
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<id>urn:sha1:a49e3c7f09abf4961f2945275338c3a0c18b9b61</id>
<content type='text'>
This function can probably be used on all x86 boards, so move it into the
common file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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