u-boot.git/arch/x86/cpu/i386, branch master

x86: Support CPU functions in long mode

2025-04-03T17:41:55Z

At present it is not possible to find out the physical-address size in long mode, so a predefined value is used. Update the macros to support this properly, since it is important when programming MTRRs. Signed-off-by: Simon Glass

x86: Rename the _D dirty flag

2025-04-03T17:41:55Z

This value happens to be used by ctype.h so chose a different name. Signed-off-by: Simon Glass

x86: Use a simple jump into long mode

2025-04-03T17:41:55Z

With the 64-bit descriptor we can use a jump instruction, rather than pushing things on the stack. Since the processor is in 64-bit mode by this point, pop a 64-bit value from the stack, containing the target address. This simplifies the code slightly, in particular its use of the stack. Signed-off-by: Simon Glass

x86: Use the same GDT when jumping to long mode

2025-04-03T17:41:55Z

Make use the existing GDT which now includes entries for 64-bit code. Leave the interrupt descriptors alone. They can be tidied up once U-Boot starts up. With this, kvm mode works with QEMU. Signed-off-by: Simon Glass Fixes: https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/31

x86: Disable paging before changing to long mode

2025-04-03T17:41:55Z

This is required as part of the procedure. The existing code works because it changes the GDT at the same time, but this makes kvm unhappy. Update the algorithm to disable and then re-enable paging. Signed-off-by: Simon Glass

x86: Use defines for the cache flags

2025-04-03T17:41:55Z

Use some named flags when setting up the cache, so it is easier to see what is going on. Signed-off-by: Simon Glass

x86: Add 64-bit entries to the GDT

2025-04-03T17:41:55Z

At present it is not possible to execution 64-bit code without installing an entire new Global Descriptor Table. This is inconvenient since kvm does not seem to like switching into long mode with a new table. It isn't actually necessary, since we can just extend the existing table. Add some new entries to this effect. Signed-off-by: Simon Glass

x86: Fix call64's section flags

2025-04-02T20:33:50Z

When a section is not flagged with SHF_ALLOC, LLD's --gc-sections algorithm fails to visit the sections that it references. As a result of this, LLD was dropping the call64.o(.data) section, which is itself only referenced by .text_call64. This appears to be a bug in LLD, but the .section directive for .text_call64 should really have the correct flags either way. Add `"ax"` to mark the section as ALLOC ("supposed to be loaded") and CODE ("supposed to be executed"). Fixes: 7dc82591d68e2a ("x86: Move call64 into its own section") Signed-off-by: Sam Edwards

x86: cpu: Mark a few functions static

2024-10-18T20:10:22Z

Some functions are not used anywhere except the same file where they are defined. Mark them static. This helps avoiding the compiler warnings: arch/x86/cpu/cpu.c:343:6: warning: no previous prototype for ‘detect_coreboot_table_at’ [-Wmissing-prototypes] arch/x86/cpu/mtrr.c:90:6: warning: no previous prototype for ‘mtrr_write_all’ [-Wmissing-prototypes] arch/x86/cpu/i386/interrupt.c:240:6: warning: no previous prototype for ‘__do_irq’ [-Wmissing-prototypes] Signed-off-by: Andy Shevchenko Reviewed-by: Simon Glass

x86: Ensure the CPU identity exists for timer init

2024-10-18T20:10:21Z

When bootstage is used the timer can be inited before the CPU identity is set up, resulting in the checks for the vendor not working. Add a special call to work around this. Signed-off-by: Simon Glass