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<title>u-boot.git/arch/x86/cpu/intel_common, branch next</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu/intel_common?h=next</id>
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<updated>2026-06-29T21:29:44Z</updated>
<entry>
<title>treewide: Staticize and constify acpi ops</title>
<updated>2026-06-29T21:29:44Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2026-06-12T02:05:38Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d5046398433e48e7b0b664c1ee3e4e2af6f861a8'/>
<id>urn:sha1:d5046398433e48e7b0b664c1ee3e4e2af6f861a8</id>
<content type='text'>
Set the acpi_ops structure as static const where applicable. The
The structure is not accessible from outside of drivers and is not
going to be modified at runtime. The structure may be unused in a
couple of drivers depending on their configuration, mark those
sites with __maybe_unused .

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>treewide: move bi_dram[] from bd to gd</title>
<updated>2026-06-25T00:13:24Z</updated>
<author>
<name>Ilias Apalodimas</name>
<email>ilias.apalodimas@linaro.org</email>
</author>
<published>2026-06-17T07:48:19Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1174c99ab421168221be372bd83a4143bf5f167d'/>
<id>urn:sha1:1174c99ab421168221be372bd83a4143bf5f167d</id>
<content type='text'>
Currently, the bi_dram[] information is stored in the board info
structure (bd). Because bd is only valid after reserve_board(),
dram_init_banksize() must be called late in the initialization process.
This limitation is problematic, as it forces us to rely on a variety of
bespoke functions to determine board RAM, bank memory sizes, and other
early setup requirements.

By moving bi_dram[] into the global data (gd), we can run it earlier.
This is particularly convenient since boards define their own
dram_init_banksize() routines, which do not always rely on parsing
Device Tree (DT) memory nodes.

Additionally, U-Boot defaults to relocating to the top of the first memory
bank. While boards currently use custom functions to override this
behavior, having the DRAM bank information available earlier in gd makes
relocating to a different bank trivial and standardizes the process.

Reviewed-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Tested-by: Michal Simek &lt;michal.simek@amd.com&gt; # Versal Gen 2 Vek385
Tested-by: Anshul Dalal &lt;anshuld@ti.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Ilias Apalodimas &lt;ilias.apalodimas@linaro.org&gt;
Tested-by: Christophe Leroy (CS GROUP) &lt;chleroy@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86: Move Intel GNVS file into the common include directory</title>
<updated>2025-06-13T19:10:33Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-05-28T12:32:07Z</published>
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<id>urn:sha1:a6e4fdfd77be4bd159cc73214bbf0a96df3aa551</id>
<content type='text'>
Move this so we can include it from sandbox, needed since it is in a
bloblist and must have a check.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>binman: x86: Write skip-at-start when end-at-4gb is used</title>
<updated>2025-05-27T09:07:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-02-16T02:02:37Z</published>
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<id>urn:sha1:92d5d1e1cdf3c146a054d36da2f6a2778d12637f</id>
<content type='text'>
The end-at-4gb property implies a value for skip-at-start so add it into
the output FDT so that U-Boot can read it.

Now that skip-at-start is implemented, we can drop the workarounds used
in the x86 code to obtain the correct image-pos value.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Kbuild: Always use $(PHASE_)</title>
<updated>2025-04-11T18:16:44Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-04-01T22:55:23Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=302b41d5397e9f821d360a74335e8821d4513970'/>
<id>urn:sha1:302b41d5397e9f821d360a74335e8821d4513970</id>
<content type='text'>
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>x86: Stop working around skip-at-start</title>
<updated>2025-03-04T14:22:11Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2025-02-26T16:26:18Z</published>
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<id>urn:sha1:ebe3c3c4a8f490b3ca373001adcb9c055f70f6d0</id>
<content type='text'>
With a recent Binman change, the skip-at-start property is now honoured,
meaning that all image-pos values in the affected section start from
the skip-at-start value.

The x86 code works around the old behaviour at present, so update it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Revert "global_data: Drop spl_handoff"</title>
<updated>2024-12-02T13:40:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-12-01T14:42:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=924a5e4e41e99cefabc465c82ffd91374d38a1e7'/>
<id>urn:sha1:924a5e4e41e99cefabc465c82ffd91374d38a1e7</id>
<content type='text'>
This breaks chromebook_coral which says:

   Video: No video mode configured in FSP!

This reverts commit 2e9313179a846b581c0fc3f6a49e19f3d343efa8.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Implement ACPI on aarch64"</title>
<updated>2024-10-28T00:44:13Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-27T23:14:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2800aecce08b47b169d8e9824dd23b1297b2cedc'/>
<id>urn:sha1:2800aecce08b47b169d8e9824dd23b1297b2cedc</id>
<content type='text'>
Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt; says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
</content>
</entry>
<entry>
<title>acpi: x86: Move MADT to common code</title>
<updated>2024-10-27T23:12:44Z</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:19:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a3fc0f525dabecaf7e84d4d9761b56c5aebf345'/>
<id>urn:sha1:4a3fc0f525dabecaf7e84d4d9761b56c5aebf345</id>
<content type='text'>
Write MADT in common code and let the SoC fill out the body by
calling acpi_fill_madt() which must be implemented at SoC level.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>global: Rename SPL_TPL_ to PHASE_</title>
<updated>2024-10-11T17:44:48Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2024-09-30T01:49:54Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5c10c8badf8233cac1593cd2bef4d0379ac9e5bd'/>
<id>urn:sha1:5c10c8badf8233cac1593cd2bef4d0379ac9e5bd</id>
<content type='text'>
Use PHASE_ as the symbol to select a particular XPL build. This means
that SPL_TPL_ is no-longer set.

Update the comment in bootstage to refer to this symbol, instead of
SPL_

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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