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<title>u-boot.git/arch/x86/cpu/interrupts.c, branch v2014.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu/interrupts.c?h=v2014.01</id>
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<updated>2013-07-24T13:44:38Z</updated>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19Z</published>
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<id>urn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>x86: Declare global_data pointer when it is used</title>
<updated>2013-05-13T20:33:20Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-04-17T16:13:33Z</published>
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<id>urn:sha1:7282d834cd47cabc481a5cbe6e686ef40751436f</id>
<content type='text'>
Several files use the global_data pointer without declaring it. This works
because the declaration is currently a NOP. But still it is better to
fix this so that x86 lines up with other archs.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Permit bootstage and timer data to be used prior to relocation</title>
<updated>2013-03-04T23:57:36Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-02-28T19:26:12Z</published>
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<id>urn:sha1:bc2df1afb92435da6fb16310dac6b722bfaade9f</id>
<content type='text'>
It is useful to be able to access the timer before U-Boot has relocated
so that we can fully support bootstage.

Add new global_data members to support this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Provide tick counter and frequency reference for Intel core architecture</title>
<updated>2012-12-06T22:30:43Z</updated>
<author>
<name>Vadim Bendebury</name>
<email>vbendeb@chromium.org</email>
</author>
<published>2012-12-03T13:59:20Z</published>
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<id>urn:sha1:7c71034d3ca2f4bd01812e94e813d35a78a27e34</id>
<content type='text'>
Some u-boot modules rely on availability of get_ticks() and
get_tbclk() functions, reporting a free running clock and its
frequency respectively. Traditionally these functions return number
and frequency of timer interrupts.

Intel's core architecture processors however are known to run the
rdtsc instruction at a constant rate of the so called 'Max Non Turbo
ratio' times the external clock frequency which is 100MHz. This is
just as good for the timer tick functions in question.

Signed-off-by: Vadim Bendebury &lt;vbendeb@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add basic cache operations</title>
<updated>2012-12-06T22:30:39Z</updated>
<author>
<name>Stefan Reinauer</name>
<email>reinauer@chromium.org</email>
</author>
<published>2012-12-02T04:49:50Z</published>
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<id>urn:sha1:095593c0301399ae834050e2008862451a72b8b0</id>
<content type='text'>
Add functions to enable/disable the data cache.

Signed-off-by: Stefan Reinauer &lt;reinauer@chromium.org&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Tweak IDT and GDT for alignment and readability</title>
<updated>2012-01-04T11:29:40Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-12-19T03:26:18Z</published>
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<id>urn:sha1:58c7a6751dd0978172741503b4dc0c6b23a60b33</id>
<content type='text'>
--
Changes for v2:
 - Renamed to better reflect nature of changes
</content>
</entry>
<entry>
<title>x86: Ensure IDT and GDT remain 16-byte aligned post relocation</title>
<updated>2011-11-29T10:10:01Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:21Z</published>
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<id>urn:sha1:303418cc97c0922cdbbc328e6d9111bd9a84d1c7</id>
<content type='text'>
Some CPUs have strict alignment requirements for these tables

Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>cosmetic: checkpatch cleanup of arch/x86/cpu/*.c</title>
<updated>2011-11-29T10:01:21Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:13Z</published>
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<id>urn:sha1:717979fdd752b80e031001c871a4fa2f84b3e3f6</id>
<content type='text'>
Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Call hang() on unrecoverable exception</title>
<updated>2011-11-29T10:01:13Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:12Z</published>
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<id>urn:sha1:6d7404c4c18ba2be711504909a67b2717ef55ac8</id>
<content type='text'>
Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>Convert ISO-8859 files to UTF-8</title>
<updated>2011-08-04T21:34:02Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2011-08-04T16:45:45Z</published>
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<id>urn:sha1:fa82f871c8dbc9a15e8dc274b3f99dd5fa0da458</id>
<content type='text'>
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.

Signed-off-by: Albert ARIBAUD &lt;albert.u.boot@aribaud.net&gt;
</content>
</entry>
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