u-boot.git/arch/x86/cpu/interrupts.c, branch v2015.04

x86: Drop old CONFIG_INTEL_CORE_ARCH code

2014-11-25T13:34:03Z

This is no-longer used, so drop it. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Refactor interrupt_init()

2014-11-25T13:34:02Z

Rename interrupt_init() in arch/x86/lib/pcat_interrupts.c to i8259_init() and create a new interrupt_init() in arch/x86/cpu/interrupt.c to call i8259_init() followed by a call to cpu_init_interrupts(). Signed-off-by: Bin Meng Acked-by: Simon Glass Tested-by: Simon Glass

x86: Fix up some missing prototypes

2014-11-21T06:24:09Z

Some functions are missing prototypes. Fix those that are specific to x86. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24T13:44:38Z

Signed-off-by: Wolfgang Denk [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini

x86: Declare global_data pointer when it is used

2013-05-13T20:33:20Z

Several files use the global_data pointer without declaring it. This works because the declaration is currently a NOP. But still it is better to fix this so that x86 lines up with other archs. Signed-off-by: Simon Glass

x86: Permit bootstage and timer data to be used prior to relocation

2013-03-04T23:57:36Z

It is useful to be able to access the timer before U-Boot has relocated so that we can fully support bootstage. Add new global_data members to support this. Signed-off-by: Simon Glass

x86: Provide tick counter and frequency reference for Intel core architecture

2012-12-06T22:30:43Z

Some u-boot modules rely on availability of get_ticks() and get_tbclk() functions, reporting a free running clock and its frequency respectively. Traditionally these functions return number and frequency of timer interrupts. Intel's core architecture processors however are known to run the rdtsc instruction at a constant rate of the so called 'Max Non Turbo ratio' times the external clock frequency which is 100MHz. This is just as good for the timer tick functions in question. Signed-off-by: Vadim Bendebury Signed-off-by: Simon Glass

x86: Add basic cache operations

2012-12-06T22:30:39Z

Add functions to enable/disable the data cache. Signed-off-by: Stefan Reinauer Signed-off-by: Simon Glass

x86: Tweak IDT and GDT for alignment and readability

2012-01-04T11:29:40Z

-- Changes for v2: - Renamed to better reflect nature of changes

x86: Ensure IDT and GDT remain 16-byte aligned post relocation

2011-11-29T10:10:01Z

Some CPUs have strict alignment requirements for these tables Signed-off-by: Graeme Russ