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<title>u-boot.git/arch/x86/cpu, branch v2015.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu?h=v2015.04</id>
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<updated>2015-03-25T03:22:37Z</updated>
<entry>
<title>x86: quark: Enable on-chip ethernet controllers</title>
<updated>2015-03-25T03:22:37Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-03-11T03:25:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e4ad6031a79fb3182613f95423ebcd771309679d'/>
<id>urn:sha1:e4ad6031a79fb3182613f95423ebcd771309679d</id>
<content type='text'>
Intel Quark SoC integrates two 10/100 ethernet controllers which can
be connected to an external RMII PHY. The MAC IP is from Designware.
Enable this support with the existing U-Boot Designware MAC driver
so that the ethernet port on Intel Galileo board can be used.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arch/x86/cpu/quark/mrc.c: Switch to U_BOOT_DATE / U_BOOT_TIME</title>
<updated>2015-03-25T03:22:37Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2015-02-19T11:58:57Z</published>
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<id>urn:sha1:1c854dc5d4d4ce3ddec08a319d1c094ade8dabe7</id>
<content type='text'>
Using __DATE__ and __TIME__ results in an error due to -Werror=date-time
with gcc-4.9 (__DATE__ / __TIME__ might prevent reproducible builds) so
switch these over to U_BOOT_DATE / U_BOOT_TIME

Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: MRC codes clean up</title>
<updated>2015-03-25T03:22:37Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-03-10T10:31:20Z</published>
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<id>urn:sha1:312cc39e270170b37a992b2d57773c828dcb9c6b</id>
<content type='text'>
This patch cleans up the quark MRC codes coding style by:
- Remove BIT0/1../31 defines from mrc_util.h
- Create names for the documented BITs and use them
- For undocumented single BITs, use (1 &lt;&lt; n) directly
- For undocumented ORed BITs, use the hex number directly
- Remove redundancy parenthesis all over the codes
- Replace to use lower case hex numbers

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>remove unnecessary version.h includes</title>
<updated>2015-03-24T14:50:50Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2015-03-17T20:28:55Z</published>
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<id>urn:sha1:7682a99826a624d3764656b5bb31f88e2f8b235b</id>
<content type='text'>
Various files are needlessly rebuilt every time due to the version and
build time changing. As version.h is not actually needed, remove the
include.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Cc: Tom Warren &lt;twarren@nvidia.com&gt;
Cc: Michal Simek &lt;monstr@monstr.eu&gt;
Cc: Macpaul Lin &lt;macpaul@andestech.com&gt;
Cc: Wolfgang Denk &lt;wd@denx.de&gt;
Cc: York Sun &lt;yorksun@freescale.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Nobuhiro Iwamatsu &lt;iwamatsu@nigauri.org&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Philippe Reynes &lt;tremyfr@yahoo.fr&gt;
Cc: Eric Jarrige &lt;eric.jarrige@armadeus.org&gt;
Cc: "David Müller" &lt;d.mueller@elsoft.ch&gt;
Cc: Phil Edworthy &lt;phil.edworthy@renesas.com&gt;
Cc: Robert Baldyga &lt;r.baldyga@samsung.com&gt;
Cc: Torsten Koschorrek &lt;koschorrek@synertronixx.de&gt;
Cc: Anatolij Gustschin &lt;agust@denx.de&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Łukasz Majewski &lt;l.majewski@samsung.com&gt;
</content>
</entry>
<entry>
<title>x86: Add SD/MMC support to quark/galileo</title>
<updated>2015-02-06T19:07:45Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-04T08:26:13Z</published>
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<id>urn:sha1:6df7ffea1399de57e5b3be6e3cd0986869087663</id>
<content type='text'>
Intel Galileo board has a microSD slot which is routed from Quark SoC
SDIO controller. Enable SD/MMC support so that we can use an SD card.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add SPI support to quark/galileo</title>
<updated>2015-02-06T19:07:45Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-04T08:26:12Z</published>
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<id>urn:sha1:728b393f3b012ac46505151b80af1d4334786845</id>
<content type='text'>
The Quark SoC contains a legacy SPI controller in the legacy bridge
which is ICH7 compatible. Like Tunnel Creek and BayTrail, the BIOS
control register offset in the ICH SPI driver is wrong for the Quark
SoC too, unprotect_spi_flash() is added to enable the flash write.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: Initialize non-standard BARs</title>
<updated>2015-02-06T19:07:44Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-04T08:26:09Z</published>
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<id>urn:sha1:b162257d4f175b59ebedd9c2db930d29317ffe16</id>
<content type='text'>
Quark SoC has some non-standard BARs (excluding PCI standard BARs)
which need be initialized with suggested values. This includes GPIO,
WDT, RCBA, PCIe ECAM and some ACPI register block base addresses.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: Call MRC in dram_init()</title>
<updated>2015-02-06T19:07:44Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-05T15:42:28Z</published>
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<id>urn:sha1:20c34115d603745cf276c683168292d02056791a</id>
<content type='text'>
Now that we have added Quark MRC codes, call MRC in dram_init() so
that DRAM can be initialized on a Quark based board.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: Enable the Memory Reference Code build</title>
<updated>2015-02-06T19:07:43Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-05T15:42:25Z</published>
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<id>urn:sha1:236b711e89b529758ab474660b936140dbab3842</id>
<content type='text'>
Turn on the Memory Reference code build in the quark Makefile.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: Add System Memory Controller support</title>
<updated>2015-02-06T19:07:43Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-05T15:42:24Z</published>
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<id>urn:sha1:b829f12afa768633502a546f678441391c1d76e4</id>
<content type='text'>
The codes are actually doing the memory initialization stuff.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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