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<title>u-boot.git/arch/x86/cpu, branch v2016.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu?h=v2016.01</id>
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<updated>2015-12-09T09:44:56Z</updated>
<entry>
<title>x86: Remove HAVE_ACPI_RESUME</title>
<updated>2015-12-09T09:44:56Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-26T01:46:09Z</published>
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<id>urn:sha1:789fa275b3750e60c60cb3d18eabc9467892c257</id>
<content type='text'>
These are currently dead codes. Until we have complete ACPI support,
we don't know if it works or not. Remove to avoid confusion.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Remove CPU_INTEL_SOCKET_RPGA989</title>
<updated>2015-12-09T09:44:54Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-26T01:46:08Z</published>
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<id>urn:sha1:d475d59020af32bd5b55ca48a5bc73213e53a7c8</id>
<content type='text'>
This Kconfig option name indicates it has something to do with cpu
socket, however it is actually not the case. Remove it and move
options inside it to NORTHBRIDGE_INTEL_IVYBRIDGE.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Clean up ivybridge/chrome Kconfig options</title>
<updated>2015-12-09T09:44:52Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-26T01:46:07Z</published>
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<id>urn:sha1:efe2d80cca4822ce6c435993e01467eeee8babfb</id>
<content type='text'>
There are some options which are never used, and also some options
which are selected by others but have never been a Kconfg option.
Clean these up.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGE</title>
<updated>2015-12-09T09:44:50Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-26T01:46:06Z</published>
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<id>urn:sha1:9bf76c21e0248d06ad7e804b1a95d6cd0bc5f14f</id>
<content type='text'>
NORTHBRIDGE_INTEL_SANDYBRIDGE is for sandybridge, not ivybridge.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Move i8254_init() to x86_cpu_init_f()</title>
<updated>2015-12-09T09:44:44Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-12-09T01:31:39Z</published>
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<id>urn:sha1:4932443d260d23c882e48eefcc66a83dfca7ee5a</id>
<content type='text'>
Right now i8254_init() is called from timer_init() in the tsc timer
driver. But actually i8254 and tsc are completely different things.
Since tsc timer has been converted to driver model, we should find
a new place that is appropriate for U-Boot to call i8254_init(),
which is now x86_cpu_init_f().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: tsc: Remove legacy timer codes</title>
<updated>2015-12-01T13:26:35Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-13T08:11:23Z</published>
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<id>urn:sha1:1d4c83c2480b0874214165571e8a056a8b423db2</id>
<content type='text'>
Now that we have converted all x86 boards to use driver model timer,
remove these legacy timer codes in the tsc driver.

Note this also removes the TSC_CALIBRATION_BYPASS Kconfig option,
as it is not needed with driver model.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Convert to use driver model timer</title>
<updated>2015-12-01T13:26:35Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-13T08:11:22Z</published>
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<id>urn:sha1:80af39842e64a44258ab5eb913659e29fc319903</id>
<content type='text'>
Convert all x86 boards to use driver model tsc timer.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Remove MIN_PORT80_KCLOCKS_DELAY</title>
<updated>2015-12-01T13:23:51Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-13T08:11:19Z</published>
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<id>urn:sha1:0f3176ed68705ceb220c395327aee7e690f7724b</id>
<content type='text'>
This is not referenced anywhere. Remove it, as well as
tsc_base_kclocks and tsc_prev in the global data.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Fix 'Reomve' typo:
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Remove legacy pci codes</title>
<updated>2015-11-13T14:46:25Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-06T10:04:54Z</published>
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<id>urn:sha1:902ca5bdf37841c0b892317be603edb41f7cbc03</id>
<content type='text'>
Now that we have converted all x86 boards to use driver model pci,
remove these legacy pci codes.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: qemu: Convert to use driver model pci</title>
<updated>2015-11-13T14:46:23Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-06T10:04:50Z</published>
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<id>urn:sha1:aedefb6f79b4c1aaca25a01ac60f58af5e9e1436</id>
<content type='text'>
Move to driver model for pci on QEMU.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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