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<title>u-boot.git/arch/x86/cpu, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu?h=v2017.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu?h=v2017.07'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2017-06-27T08:31:30Z</updated>
<entry>
<title>Revert "x86: Convert MMC to driver model"</title>
<updated>2017-06-27T08:31:30Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-06-26T23:36:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da2364cc14a0b34411c4a228ae687a23504afe04'/>
<id>urn:sha1:da2364cc14a0b34411c4a228ae687a23504afe04</id>
<content type='text'>
This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.

With MMC converted to driver model, SCSI driver is broken due to
zero address access at (ops-&gt;read) in block_dread() function.

The fix (SCSI driver converted to DM) is ready in u-boot-dm branch,
but it is too late for this relese to get that in.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Fix boot hang with a debug build</title>
<updated>2017-06-05T00:55:22Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-06-01T10:41:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=37d1023264e7b73b72e0c42fd55de91c7018135d'/>
<id>urn:sha1:37d1023264e7b73b72e0c42fd55de91c7018135d</id>
<content type='text'>
It was observed that when -DDEBUG is used to generate a debug build,
U-Boot does not boot on MinnowMax board. A workaround is to disable
CONFIG_DEBUG_UART. The real issue is that in order to have the debug
uart to work, BayTrail SoC needs to be configured so that its internal
uart is available to be used as the debug uart.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer</title>
<updated>2017-06-05T00:55:22Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-05-31T08:04:15Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f8f291b0962c795fcb025338d5c2284e2357a669'/>
<id>urn:sha1:f8f291b0962c795fcb025338d5c2284e2357a669</id>
<content type='text'>
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Use macros instead of magic numbers for FSP settings</title>
<updated>2017-06-05T00:55:22Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-05-31T08:04:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5e74e5a6826f8cf194ef5a569d6cafd2ed924f5c'/>
<id>urn:sha1:5e74e5a6826f8cf194ef5a569d6cafd2ed924f5c</id>
<content type='text'>
Introduce various meaningful macros for FSP settings and switch over
to use them instead of magic numbers.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Remove "serial-debug-port-*" settings</title>
<updated>2017-06-05T00:55:22Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-05-31T08:04:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6702488cfa90831454d83a63eb0b4a0bb82a3a1f'/>
<id>urn:sha1:6702488cfa90831454d83a63eb0b4a0bb82a3a1f</id>
<content type='text'>
"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1</title>
<updated>2017-06-05T00:55:22Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-05-31T08:04:12Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=455a5a8086b17bd6fb60c86ec34299cae6ce2950'/>
<id>urn:sha1:455a5a8086b17bd6fb60c86ec34299cae6ce2950</id>
<content type='text'>
The default value of "fsp,mrc-init-tseg-size" should be 1 (1MB) per
FSP default settings. 0 is not valid.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Convert MMC to driver model</title>
<updated>2017-05-17T09:13:06Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-04-10T00:38:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ddb3ac3c716f56cead695444e65a7ba7b0946555'/>
<id>urn:sha1:ddb3ac3c716f56cead695444e65a7ba7b0946555</id>
<content type='text'>
Convert the pci_mmc driver over to driver model and migrate all x86 boards
that use it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: acpi: Fix Windows S3 resume failure</title>
<updated>2017-05-17T09:11:46Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-04-21T14:24:47Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5ae5aa931042bb4163c6343a3cba65e95d90205a'/>
<id>urn:sha1:5ae5aa931042bb4163c6343a3cba65e95d90205a</id>
<content type='text'>
U-Boot sets up the real mode interrupt handler stubs starting from
address 0x1000. In most cases, the first 640K (0x00000 - 0x9ffff)
system memory is reported as system RAM in E820 table to the OS.
(see install_e820_map() implementation for each platform). So OS
can use these memories whatever it wants.

If U-Boot is in an S3 resume path, care must be taken not to corrupt
these memorie otherwise OS data gets lost. Testing shows that, on
Microsoft Windows 10 on Intel Baytrail its wake up vector happens to
be installed at the same address 0x1000. While on Linux its wake up
vector does not overlap this memory range, but after resume kernel
checks low memory range per config option CONFIG_X86_RESERVE_LOW
which is 64K by default to see whether a memory corruption occurs
during the suspend/resume (it's harmless, but warnings are shown
in the kernel dmesg logs).

We cannot simply mark the these memory as reserved in E820 table
because such configuration makes GRUB complain: unable to allocate
real mode page. Hence we choose to back up these memories to the
place where we reserved on our stack for our S3 resume work.
Before jumping to OS wake up vector, we need restore the original
content there.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: acpi: Refactor acpi_resume()</title>
<updated>2017-05-17T09:11:46Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-04-21T14:24:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f4e25887dfb3b54b21430340c511f7fd54bc955'/>
<id>urn:sha1:0f4e25887dfb3b54b21430340c511f7fd54bc955</id>
<content type='text'>
To do something more in acpi_resume() like turning on ACPI mode,
we need locate ACPI FADT table pointer first. But currently this
is done in acpi_find_wakeup_vector().

This changes acpi_resume() signature to accept ACPI FADT pointer
as the parameter. A new API acpi_find_fadt() is introduced, and
acpi_find_wakeup_vector() is updated to use FADT pointer as the
parameter as well.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: Adjust board_final_cleanup() order</title>
<updated>2017-05-17T09:11:46Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-04-21T14:24:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bffd798136deb4622059b5aeb33c375fad554ac7'/>
<id>urn:sha1:bffd798136deb4622059b5aeb33c375fad554ac7</id>
<content type='text'>
Call board_final_cleanup() before write_tables(), so that anything
done in board_final_cleanup() on a normal boot path is also done
on an S3 resume path.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
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