<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/arch/x86/cpu, branch v2018.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/cpu?h=v2018.01</id>
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<updated>2017-12-12T23:13:19Z</updated>
<entry>
<title>ata: Migrate CONFIG_SCSI_AHCI to Kconfig</title>
<updated>2017-12-12T23:13:19Z</updated>
<author>
<name>Tuomas Tynkkynen</name>
<email>tuomas.tynkkynen@iki.fi</email>
</author>
<published>2017-12-08T13:36:19Z</published>
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<id>urn:sha1:9fd95ef0d39819fb27441fdd0f1b15b05d9b5085</id>
<content type='text'>
And use 'imply' liberally.

Signed-off-by: Tuomas Tynkkynen &lt;tuomas.tynkkynen@iki.fi&gt;
</content>
</entry>
<entry>
<title>x86: don't compare pointers to 0</title>
<updated>2017-11-30T05:50:17Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2017-11-20T18:45:56Z</published>
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<id>urn:sha1:39670c341f0598dd00e5124deb5b479bf674b949</id>
<content type='text'>
x86_vendor_name is defined as

static const char *const x86_vendor_name[]

So its elements should not be compared to 0.

Remove superfluous paranthesis.

Problem identified with Coccinelle.

Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: qemu: Move Cache-As-RAM memory from area mapped to ROM</title>
<updated>2017-11-30T05:50:17Z</updated>
<author>
<name>Anton Gerasimov</name>
<email>anton@advancedtelematic.com</email>
</author>
<published>2017-11-14T17:47:16Z</published>
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<id>urn:sha1:80f3425c5733bbf4459db86e60dc363342bdc2d6</id>
<content type='text'>
ROM has been made read-only in qemu recently (namely commit 208fa0e4:
"pc: make 'pc.rom' readonly when machine has PCI enabled"). So this
patch restores compatibility between U-Boot and qemu.

Signed-off-by: Anton Gerasimov &lt;anton@advancedtelematic.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
[bmeng: mention qemu commit title in the commit message]
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: braswell: cherryhill: Update dts for SPI lock down</title>
<updated>2017-10-27T07:13:47Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-19T01:20:58Z</published>
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<id>urn:sha1:4c9f4c5ee4ac15a285f3ceb25752432990084dc1</id>
<content type='text'>
Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>env: x86: braswell: Set ENV_IS_IN_SPI_FLASH as default</title>
<updated>2017-10-27T07:13:47Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-19T01:20:54Z</published>
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<id>urn:sha1:3a856473fdb05f8c20686f6240781ecb2c0c1b61</id>
<content type='text'>
Imply does not work for a Kconfig choice. Update ENV_IS_IN_SPI_FLASH
to be the default one for Intel Braswell.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: braswell: Fix unexpected crash during Linux kernel boot</title>
<updated>2017-10-27T07:13:47Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-19T01:20:53Z</published>
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<id>urn:sha1:4a5a7fcac24498aa1535a467f0739e2fda5b4324</id>
<content type='text'>
It was observed that when booting Linux kernel on Intel Cherry Hill
board, unexpected crash happens quite randomly. Sometimes kernel
just oops, while sometimes kernel throws MCE errors and hangs:

  mce: [Hardware Error]: Machine check events logged
  mce: [Hardware Error]: CPU 0: Machine Check: 0 Bank 4: c400000000010151
  mce: [Hardware Error]: TSC 0 ADDR 130f3f2c0
  mce: [Hardware Error]: PROCESSOR 0:406c3 TIME 1508160686 SOCKET 0 APIC 0 microcode 363

This looks like a hardware error per mcelog. After debugging, it
seems turning off turbo mode on the processor does not expose this
behavior, although U-Boot runs OK with turbo mode on. Suspect it is
related to an errata of Braswell processor.

To fix this, remove the Braswell cpu driver which does the turbo
mode configuration, and switch to use the generic cpu-x86 driver.
Also there is a configuration option in the FSP that turns on the
turbo mode and that has been turned off too.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: fsp: Move Azalia update codes to board</title>
<updated>2017-10-19T03:37:51Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-13T08:30:06Z</published>
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<id>urn:sha1:83262f99cd3619336b0d48257bc6595b7610a134</id>
<content type='text'>
Azalia configuration may be different across boards, hence it's not
appropriate to do that in the SoC level. Instead, let's make the
SoC update_fsp_azalia_configs() routine as a weak version, and do
the actual work in the board codes.

So far it seems only som-db5800-som-6867 board enables the Azalia.
Move the original codes into som-db5800-som-6867.c.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: fsp: Use a function to update the Azalia config pointer</title>
<updated>2017-10-19T03:37:51Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-13T08:30:05Z</published>
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<id>urn:sha1:f6859558ca4e18d3a76fafb85924a50026be82fb</id>
<content type='text'>
At present we directly pass the Azalia config pointer to the FSP UPD.
This updates to use a function to do the stuff, like Braswell does.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Consolidate Azalia header file</title>
<updated>2017-10-19T03:37:51Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-13T08:30:04Z</published>
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<id>urn:sha1:abddcd52ab4979a57dc90ce1b90f8121b43d91b2</id>
<content type='text'>
So far there are two copies of Azalia struct defines with one in
baytrail and the other one in braswell. This consolidates these
two into one, put it in the common place, and remove the prefix
pch_ to these structs to make their names more generic.

This also corrects reset_wait_timer from us to ms.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: baytrail: Fix unstable ACPI S3 resume</title>
<updated>2017-10-19T03:37:51Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-10-12T12:07:57Z</published>
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<id>urn:sha1:febdfaabc73473ca01e193e0a4be7e89e8f80cb4</id>
<content type='text'>
It was observed that when booting a Ubuntu 16.04 kernel, doing ACPI
S3 suspend/resume sometimes causes the Ubuntu kernel hang forever.
The issue is however not reproduced with a kernel built from i386/
x86_64 defconfig configuration.

The unstability is actually caused by unexpected interrupts being
generated during the S3 resume. For some unknown reason, FSP (gold4)
for BayTrail configures the GPIO DFX5 PAD to enable level interrupt
(bit 24 and 25). As this pin keeps generating interrupts during an
S3 resume, and there is no IRQ requester in the kernel to handle it,
the kernel seems to hang and does not continue resuming.

Clear the mysterious interrupt bits for this pin.

Reported-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
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