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<title>u-boot.git/arch/x86/include/asm/arch-coreboot, branch v2016.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/include/asm/arch-coreboot?h=v2016.01</id>
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<updated>2015-08-26T14:54:06Z</updated>
<entry>
<title>x86: coreboot: Increase memrange entry number to 32</title>
<updated>2015-08-26T14:54:06Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-08-13T07:29:08Z</published>
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<id>urn:sha1:89b870814c03777c3a8d3f2e3ed761479a9f1456</id>
<content type='text'>
Increase lib_sysinfo memrange entry number to 32 to sync with coreboot.
This allows a complete E820 table to be reported to the kernel, as on
some platforms (eg: Bayley Bay) having only 16 entires does not cover
all the memory ranges.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Use ipchecksum from net/</title>
<updated>2015-01-24T13:13:44Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-20T05:16:09Z</published>
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<id>urn:sha1:b18c68d8918095672b295aef7bfbfc466b82c710</id>
<content type='text'>
The existing IP checksum function is only accessible to the 'coreboot' cpu.
Drop it in favour of the new code in the network subsystem.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: ich6-gpio: Move setup_pch_gpios() to board support codes</title>
<updated>2014-12-14T05:32:04Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2014-12-12T13:05:23Z</published>
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<id>urn:sha1:2795573a8c9c62db7b4bcf4bddf54d73b6ae61d3</id>
<content type='text'>
Movie setup_pch_gpios() in the ich6-gpio driver to the board support
codes, so that the driver does not need to know any platform specific
stuff (ie: include the platform specifc chipset header file).

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Replace &lt;compiler.h&gt; with &lt;linux/compiler.h&gt;</title>
<updated>2014-12-08T14:35:46Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-11-26T07:00:58Z</published>
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<id>urn:sha1:afc366f01bea2361bc08b1a7b51e0cef81d66173</id>
<content type='text'>
Including &lt;linux/compiler.h&gt; is enough for general use.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>x86: ivybridge: Add support for early GPIO init</title>
<updated>2014-11-21T06:34:14Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-13T05:42:24Z</published>
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<id>urn:sha1:1b4f25ff8e6967f14494c5a0d173758a7a3ac279</id>
<content type='text'>
When not relying on Coreboot for GPIO init the GPIOs must be set up
correctly. This is currently done statically through a rather ugly method.
As the GPIOs are figured out they can be moved to the device tree and set
up as needed rather than all at the start.

In this implementation, board files should call ich_gpio_set_gpio_map()
before the GPIO driver is used in order to provide the GPIO information.
We use the early PCI interface so that this driver can now be used before
relocation.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: x86: Add a gpio header for coreboot</title>
<updated>2014-10-24T01:45:28Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-10T13:49:17Z</published>
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<id>urn:sha1:c15b0b86d1cf74b2ca5b340d9caf1517cee1cf9e</id>
<content type='text'>
This code doesn't follow the normal approach of having its arch-specific
definitions in an arch-specific directory. Add a new arch-specific file
and make use of it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>SPDX-License-Identifier: convert BSD-3-Clause files</title>
<updated>2013-08-19T19:45:35Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-28T20:12:47Z</published>
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<id>urn:sha1:cb3761ea995ca2699db19f54e7c5f7e463381459</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini Don't remove some copyrights by accident]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>x86: Support adding coreboot timestanps to bootstage</title>
<updated>2013-05-13T20:33:22Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-04-17T16:13:47Z</published>
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<id>urn:sha1:5397d8058c15eafc227eb7ff8703008b5c89b4a9</id>
<content type='text'>
Coreboot provides a lot of useful timing information. Provide a facility
to add this to bootstage on start-up.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Clean up libfdt.h includes</title>
<updated>2013-02-09T03:32:38Z</updated>
<author>
<name>Gerald Van Baren</name>
<email>gvb@unssw.com</email>
</author>
<published>2013-02-08T00:49:54Z</published>
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<id>urn:sha1:58864ddc7276ca7403ddbb716da5853638f37519</id>
<content type='text'>
The libfdt.h file is the definition file for libfdt.  It is unnecessary
to include other fdt header files (the necessary ones are pulled in
by libfdt.h).

Signed-off-by: Gerald Van Baren &lt;gvb@unssw.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>treewide: include libfdt_env.h before fdt.h</title>
<updated>2013-02-08T01:38:55Z</updated>
<author>
<name>Kim Phillips</name>
<email>kim.phillips@freescale.com</email>
</author>
<published>2013-01-16T13:59:04Z</published>
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<id>urn:sha1:12e06fe03fdcd9cb9e9805ff78d1027377a1416d</id>
<content type='text'>
and, if including libfdt.h which includes libfdt_env.h in
the correct order, don't include fdt.h before libfdt.h.

this is needed to get the fdt type definitions set from
the project environment before fdt.h uses them.

Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Cc: Jerry Van Baren &lt;gvb.uboot@gmail.com&gt;
</content>
</entry>
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