u-boot.git/arch/x86/include/asm/cpu.h, branch v2016.09

x86: Add support for running Intel reference code

2016-03-17T02:27:25Z

Intel has invented yet another binary blob which firmware is required to run. This is run after SDRAM is ready. It is linked to load at a particular address, typically 0, but is a relocatable ELF so can be moved if required. Add support for this in the build system. The file should be placed in the board directory, and called refcode.elf. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Add an ICH6 pin configuration driver

2016-03-17T02:27:25Z

Add a driver which sets up the pin configuration on x86 devices with an ICH6 (or later) Platform Controller Hub. The driver is not in the pinctrl uclass due to some oddities of the way x86 devices work: - The GPIO controller is not present in I/O space until it is set up - This is done by writing a register in the PCH - The PCH has a driver which itself uses PCI, another driver - The pinctrl uclass requires that a pinctrl device be available before any other device can be probed It would be possible to work around the limitations by: - Hard-coding the GPIO address rather than reading it from the PCH - Using special x86 PCI access to set the GPIO address in the PCH However it is not clear that this is better, since the pin configuration driver does not actually provide normal pin configuration services - it simply sets up all the pins statically when probed. While this remains the case, it seems better to use a syscon uclass instead. This can be probed whenever it is needed, without any limitations. Also add an 'invert' property to support inverting the input. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: cpu: Add functions to return the family and stepping

2016-03-17T02:27:24Z

These two identifiers can be useful for drivers which need to adjust their behaviour depending on the CPU family or stepping (revision). Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: ivybridge: Use syscon for the GMA device

2016-01-24T04:09:42Z

Until we have a proper video uclass we can use syscon to handle the GMA device, and avoid the special device tree and PCI searching. Update the code to work this way. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Set up a shared syscon numbering schema

2016-01-24T04:09:42Z

Each system controller can have a number to identify it. It can then be accessed using syscon_get_by_driver_data(). Put this in a shared header file and update the only current user. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Add a way to call 32-bit code from 64-bit mode

2015-08-05T14:44:07Z

The procedure to drop from 64-bit mode to 32-bit is a bit messy. Add a function to take care of it. It requires identity-mapped pages and that the calling code is running below 4GB. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Add an enum for some commonly-used GDT bits

2015-08-05T14:44:07Z

Rather than add these as open-coded values, create an enum with the commonly used flags. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: dm: Clean up cpu drivers

2015-07-15T00:03:15Z

This commit does the following to clean up x86 cpu dm drivers: - Move cpu_x86 driver codes from arch/x86/cpu/cpu.c to a dedicated file arch/x86/cpu/cpu_x86.c - Rename x86_cpu_get_desc() to cpu_x86_get_desc() to keep consistent naming with other dm drivers - Add a new cpu_x86_bind() in the cpu_x86 driver which does exactly the same as the one in the intel baytrail cpu driver - Update intel baytrail cpu driver to use cpu_x86_get_desc() and cpu_x86_bind() Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: Allow CPUs to be set up after relocation

2015-04-30T22:13:48Z

This permits init of additional CPU cores after relocation and when driver model is ready. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Add an mfence macro

2015-04-30T03:02:34Z

Provide access to this x86 instruction from C code. Signed-off-by: Simon Glass Reviewed-by: Bin Meng