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<title>u-boot.git/arch/x86/include, branch v2015.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/include?h=v2015.04</id>
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<updated>2015-03-28T13:03:08Z</updated>
<entry>
<title>generic-board: select SYS_GENERIC_BOARD for some architectures</title>
<updated>2015-03-28T13:03:08Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-03-19T10:42:52Z</published>
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<id>urn:sha1:0a9e7ee5bd61507eed40070f4fed238f5a0485b8</id>
<content type='text'>
We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-x86</title>
<updated>2015-02-10T15:42:56Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2015-02-10T15:42:56Z</published>
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<id>urn:sha1:db7a7dee6878fe7539d5967de1caff83246254e0</id>
<content type='text'>
</content>
</entry>
<entry>
<title>common: Move dram_init() declaration to common location</title>
<updated>2015-02-09T14:08:48Z</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2015-01-30T09:51:46Z</published>
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<id>urn:sha1:0267ba5d869cdc482c0b947ef8de89ce7403ac8c</id>
<content type='text'>
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: Initialize non-standard BARs</title>
<updated>2015-02-06T19:07:44Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-04T08:26:09Z</published>
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<id>urn:sha1:b162257d4f175b59ebedd9c2db930d29317ffe16</id>
<content type='text'>
Quark SoC has some non-standard BARs (excluding PCI standard BARs)
which need be initialized with suggested values. This includes GPIO,
WDT, RCBA, PCIe ECAM and some ACPI register block base addresses.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: Add Memory Reference Code (MRC) main routines</title>
<updated>2015-02-06T19:07:42Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-05T15:42:22Z</published>
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<id>urn:sha1:0a391b1c797ba9deb8d746cf98a08b394f42e0ee</id>
<content type='text'>
Add the main routines for Quark Memory Reference Code (MRC).

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add basic Intel Quark processor support</title>
<updated>2015-02-06T19:07:41Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-02T14:35:27Z</published>
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<id>urn:sha1:828d9af5eca7404ded18e0ede453f8040fd01f78</id>
<content type='text'>
Add minimum codes to support Intel Quark SoC. DRAM initialization
is not ready yet so a hardcoded gd-&gt;ram_size is assigned.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Define macros for pci configuration space access</title>
<updated>2015-02-06T19:07:40Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-02T14:35:25Z</published>
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<id>urn:sha1:3c8ae536ec26ffc7715e38876b43f88286a98fd8</id>
<content type='text'>
Move PCI_REG_ADDR and PCI_REG_DATA from arch/x86/lib/pci_type1.c to
arch/x86/include/asm/pci.h, also define PCI_CFG_EN so that these
macros can be used for pci configuration space access.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: quark: Add routines to access message bus registers</title>
<updated>2015-02-06T19:07:40Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-02T14:35:24Z</published>
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<id>urn:sha1:faa832329932c4559a8d03d4212881b6146da5df</id>
<content type='text'>
In the Quark SoC, some chipset commands are accomplished by utilizing
the internal message network within the host bridge (D0:F0). Accesses
to this network are accomplished by populating the message control
register (MCR), Message Control Register eXtension (MCRX) and the
message data register (MDR).

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add header files for Intel Quark SoC defines</title>
<updated>2015-02-06T19:07:40Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-02-02T14:35:23Z</published>
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<id>urn:sha1:b994efbd2d515ee0ec50c03191ffb348b197d4f3</id>
<content type='text'>
device.h for integrated pci devices' bdf on Quark SoC and quark.h for
various memory-mapped and i/o-mapped base addresses within SoC.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add support for Intel Minnowboard Max</title>
<updated>2015-02-06T19:07:39Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-28T05:13:47Z</published>
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<id>urn:sha1:3a1a18ff1867d6f94921a24992354d3a547666d6</id>
<content type='text'>
This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.

This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).

Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
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