u-boot.git/arch/x86/lib/Makefile, branch v2014.01Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/arch/x86/lib/Makefile?h=v2014.012013-11-01T15:42:12Zx86: convert makefiles to Kbuild style2013-11-01T15:42:12ZMasahiro Yamadayamada.m@jp.panasonic.com2013-10-21T02:53:34Zurn:sha1:3954b739b32de7c634b21496c229d30a085a19e2
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Add GPL-2.0+ SPDX-License-Identifier to source files2013-07-24T13:44:38ZWolfgang Denkwd@denx.de2013-07-08T07:37:19Zurn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTM2013-07-16T22:44:30ZDirk Eibacheibach@gdsys.de2013-06-26T13:55:16Zurn:sha1:b8eee4354f33b9810d929b6f7df74238b538e5a8
MAKEALL is fine for ppc4xx and mpc85xx.
Run checks were done on our controlcenterd hardware.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Andy Fleming <afleming@freescale.com>
x86: Re-enable PCAT timer 2 for beeping2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:39Zurn:sha1:d0b6f247a1e7ffd06d931ca4088426134dc4e546
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Remove ISR timer2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:38Zurn:sha1:f9083bbe784cb03940b094afe4db0bf94f312f2b
This is no longer used since we prefer the more accurate TSC timer, so
remove the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
x86: Add TSC timer2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:36Zurn:sha1:e761ecdbb83e3151ffea5b531523256c57e62527
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Remove legacy board init code2013-05-13T20:33:20ZSimon Glasssjg@chromium.org2013-04-17T16:13:32Zurn:sha1:fa790fa0a91b9d029ec6fdac791066bc5d16b862
Since we use CONFIG_SYS_GENERIC_BOARD on x86, we don't need this anymore.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
x86: Remove unused bios/pci code2013-05-13T20:31:18ZSimon Glasssjg@chromium.org2013-04-17T16:13:30Zurn:sha1:dfdedd9c2ec805917a6f43cffd9d80125180bb28
Graeme Russ pointed out that this code is no longer used. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
x86: Enable generic board support2013-03-15T20:14:00ZSimon Glasssjg@chromium.org2013-03-11T07:40:13Zurn:sha1:e424c15c1f4ef8a084120f111d95da60676ba1cc
This enables generic board support so that x86 boards can define
CONFIG_SYS_GENERIC_BOARD.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Remove unused real mode code2013-02-15T04:19:03ZSimon Glasssjg@chromium.org2013-02-14T17:38:30Zurn:sha1:96dfc0633aabb4f8fb720d39d9deb29dde08749b
This code is pretty old and we want to support only 32-bit systems now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>