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<title>u-boot.git/arch/x86/lib/Makefile, branch v2015.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/lib/Makefile?h=v2015.01</id>
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<updated>2014-12-14T05:32:06Z</updated>
<entry>
<title>x86: Add a simple command to show FSP HOB information</title>
<updated>2014-12-14T05:32:06Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2014-12-12T13:05:32Z</published>
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<id>urn:sha1:ba7b38a5295d9bad1a95f53f0a3ade20441a3831</id>
<content type='text'>
FSP builds a series of data structures called the Hand-Off-Blocks
(HOBs) as it progresses through initializing the silicon. These data
structures conform to the HOB format as described in the Platform
Initialization (PI) specification Volume 3 Shared Architectual
Elements specification, which is part of the UEFI specification.

Create a simple command to parse the HOB list to display the HOB
address, type and length in bytes.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Add support for running option ROMs natively</title>
<updated>2014-11-25T13:38:57Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T03:56:32Z</published>
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<id>urn:sha1:0ca2426beae04189f094180748e72463f48a9270</id>
<content type='text'>
On x86 machines we can use an emulator to run option ROMS as with other
architectures. But with some additional effort (mostly due to the 16-bit
nature of option ROMs) we can run them natively. Add support for this.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: ivybridge: Implement SDRAM init</title>
<updated>2014-11-21T06:34:15Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-13T05:42:28Z</published>
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<id>urn:sha1:65dd74a674d636afcc14594c8308ff516e95a445</id>
<content type='text'>
Implement SDRAM init using the Memory Reference Code (mrc.bin) provided in
the board directory and the SDRAM SPD information in the device tree. This
also needs the Intel Management Engine (me.bin) to work. Binary blobs
everywhere: so far we have MRC, ME and microcode.

SDRAM init works by setting up various parameters and calling the MRC. This
in turn does some sort of magic to work out how much memory there is and
the timing parameters to use. It also sets up the DRAM controllers. When
the MRC returns, we use the information it provides to map out the
available memory in U-Boot.

U-Boot normally moves itself to the top of RAM. On x86 the RAM is not
generally contiguous, and anyway some RAM may be above 4GB which doesn't
work in 32-bit mode. So we relocate to the top of the largest block of
RAM we can find below 4GB. Memory above 4GB is accessible with special
functions (see physmem).

It would be possible to build U-Boot in 64-bit mode but this wouldn't
necessarily provide any more memory, since the largest block is often below
4GB. Anyway U-Boot doesn't need huge amounts of memory - even a very large
ramdisk seldom exceeds 100-200MB. U-Boot has support for booting 64-bit
kernels directly so this does not pose a limitation in that area. Also there
are probably parts of U-Boot that will not work correctly in 64-bit mode.
The MRC is one.

There is some work remaining in this area. Since memory init is very slow
(over 500ms) it is possible to save the parameters in SPI flash to speed it
up next time. Suspend/resume support is not fully implemented, or at least
it is not efficient.

With this patch, link boots to a prompt.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: set CONFIG_USE_PRIVATE_LIBGCC to y</title>
<updated>2014-10-23T17:19:04Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-10-23T16:30:41Z</published>
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<id>urn:sha1:dd43fa22de5fcffd6325fc38633ccc71734826c7</id>
<content type='text'>
The motivation of this commit is to change CONFIG_USE_PRIVATE_LIBGCC
to a boolean macro so we can move it to Kconfig.

In the current implementation, there are two forms of syntax
for this macro:

  - CONFIG_USE_PRIVATE_LIBGCC=y
  - CONFIG_USE_PRIVATE_LIBGCC=path/to/private/libgcc

The latter is only used by x86 architecture.
With a little bit refactoring, it can be converted to the former.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>kbuild, x86: use a short log for arch/x86/lib/libgcc.a</title>
<updated>2014-03-12T21:04:42Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-03-11T02:05:13Z</published>
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<id>urn:sha1:b6e53eb320cd3f3685422c1f5274d13a239dc5b0</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>kbuild: change out-of-tree build</title>
<updated>2014-02-19T16:07:50Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-02-04T08:24:24Z</published>
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<id>urn:sha1:9e4140329ee9a787d0f96ac2829d618d47f7973f</id>
<content type='text'>
This commit changes the working directory
where the build process occurs.

Before this commit, build process occurred under the source
tree for both in-tree and out-of-tree build.

That's why we needed to add $(obj) prefix to all generated
files in makefiles like follows:
  $(obj)u-boot.bin:  $(obj)u-boot

Here, $(obj) is empty for in-tree build, whereas it points
to the output directory for out-of-tree build.

And our old build system changes the current working directory
with "make -C &lt;sub-dir&gt;" syntax when descending into the
sub-directories.

On the other hand, Kbuild uses a different idea
to handle out-of-tree build and directory descending.

The build process of Kbuild always occurs under the output tree.
When "O=dir/to/store/output/files" is given, the build system
changes the current working directory to that directory and
restarts the make.

Kbuild uses "make -f $(srctree)/scripts/Makefile.build obj=&lt;sub-dir&gt;"
syntax for descending into sub-directories.
(We can write it like "make $(obj)=&lt;sub-dir&gt;" with a shorthand.)
This means the current working directory is always the top
of the output directory.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Tested-by: Gerhard Sittig &lt;gsi@denx.de&gt;
</content>
</entry>
<entry>
<title>x86: convert makefiles to Kbuild style</title>
<updated>2013-11-01T15:42:12Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-10-21T02:53:34Z</published>
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<id>urn:sha1:3954b739b32de7c634b21496c229d30a085a19e2</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Add GPL-2.0+ SPDX-License-Identifier to source files</title>
<updated>2013-07-24T13:44:38Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2013-07-08T07:37:19Z</published>
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<id>urn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a</id>
<content type='text'>
Signed-off-by: Wolfgang Denk &lt;wd@denx.de&gt;
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTM</title>
<updated>2013-07-16T22:44:30Z</updated>
<author>
<name>Dirk Eibach</name>
<email>eibach@gdsys.de</email>
</author>
<published>2013-06-26T13:55:16Z</published>
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<id>urn:sha1:b8eee4354f33b9810d929b6f7df74238b538e5a8</id>
<content type='text'>
MAKEALL is fine for ppc4xx and mpc85xx.
Run checks were done on our controlcenterd hardware.

Signed-off-by: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>x86: Re-enable PCAT timer 2 for beeping</title>
<updated>2013-05-13T20:33:21Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-04-17T16:13:39Z</published>
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<id>urn:sha1:d0b6f247a1e7ffd06d931ca4088426134dc4e546</id>
<content type='text'>
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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