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<title>u-boot.git/arch/x86/lib/fsp, branch v2016.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch/x86/lib/fsp?h=v2016.01</id>
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<updated>2015-11-13T14:46:25Z</updated>
<entry>
<title>x86: Remove legacy pci codes</title>
<updated>2015-11-13T14:46:25Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-11-06T10:04:54Z</published>
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<id>urn:sha1:902ca5bdf37841c0b892317be603edb41f7cbc03</id>
<content type='text'>
Now that we have converted all x86 boards to use driver model pci,
remove these legacy pci codes.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Pass mrc cache to fsp_init() and save it to gd after fsp_init()</title>
<updated>2015-10-21T13:46:27Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-10-12T04:37:42Z</published>
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<id>urn:sha1:ff1e18af9dad21fe4963da80b3cf4170f8d6f209</id>
<content type='text'>
fsp_init() call has a parameter nvs_buf which is used by FSP as the
MRC cache but currently is blindly set to NULL. Retreive the MRC
cache from SPI flash and pass it to fsp_init() call. After the call,
save FSP produced MRC cache to SPI flash too.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Add a hdr sub-command to show header information</title>
<updated>2015-10-21T13:46:26Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-10-10T08:47:59Z</published>
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<id>urn:sha1:010921ae7f1dff83246a88d1e6fb3559134fe72a</id>
<content type='text'>
It would be helpful to have a command to show FSP header. So far
it only supports FSP header which conforms to FSP spec 1.0.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Make hob command a sub-command to fsp</title>
<updated>2015-10-21T13:46:26Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-10-10T08:47:58Z</published>
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<id>urn:sha1:62716ebb751dbe7346ff52b17be867505d959bcc</id>
<content type='text'>
Introduce a new fsp command and make the existing hob command a
sub-command to fsp for future extension. Also move cmd_hob.c to
the dedicated fsp sub-directory in arch/x86/lib.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Report correct number of E820 table entries</title>
<updated>2015-09-29T04:56:27Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-09-28T09:11:59Z</published>
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<id>urn:sha1:196193a4d4963a8dde00c7cdd0ec83b60ea61e61</id>
<content type='text'>
The logic to calculate the number of E820 table entries is wrong
when walking through the FSP HOB tables. Fix it.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Jian Luo &lt;jian.luo4@boschrexroth.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Add comments about U-Boot entering start.S twice</title>
<updated>2015-08-26T14:54:11Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-08-20T13:40:20Z</published>
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<id>urn:sha1:48aa6c261492235c1e48c17a6604b71e032485e8</id>
<content type='text'>
Add some comments in start.S for the fact that with FSP U-Boot
actually enters the code twice. Also change to use fsp_init()
and fsp_continue for accuracy.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Enlarge the size of malloc() pool before relocation</title>
<updated>2015-08-26T14:54:11Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-08-20T13:40:19Z</published>
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<id>urn:sha1:57b10f59b7c6ff0d3827e39acb6c3e348adbc14a</id>
<content type='text'>
After fsp_init() returns, the stack has already been switched to a
place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
Enlarge the size of malloc() pool before relocation since we have
plenty of memory now.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Drop FSP error defines and use EFI instead</title>
<updated>2015-08-14T15:50:13Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-13T01:33:07Z</published>
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<id>urn:sha1:ecf674b772713837e1d36f9c70ee319d7753a895</id>
<content type='text'>
Now that we have an efi.h header we can use that for FSP error defines.
Drop the FSP ones.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Split out fsp_init_phase_pci() code into a new function</title>
<updated>2015-08-14T09:24:21Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-10T13:05:07Z</published>
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<id>urn:sha1:412400abaaa6ef02adff35419188689ea6d3ec7e</id>
<content type='text'>
This code may be useful for boards that use driver model for PCI.

Note: It would be better to have driver model automatically call this
function somehow. However for now it is probably safer to have it under
board control.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: fsp: Do not assert VPD_IMAGE_REV when DEBUG</title>
<updated>2015-08-14T09:24:21Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2015-08-08T14:01:23Z</published>
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<id>urn:sha1:da60fb79349320a21fd0b7c1e602fa492291d1f7</id>
<content type='text'>
When using different release version of Intel FSP, the VPD_IMAGE_REV
is different (ie: BayTrail Gold 3 is 0x0303 while Gold 4 is 0x0304).
Remove the asserting of this so that U-Boot does not hang in a debug
build.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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