u-boot.git/arch/x86/lib/tsc_timer.c, branch v2014.01Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/arch/x86/lib/tsc_timer.c?h=v2014.012013-07-24T13:44:38ZAdd GPL-2.0+ SPDX-License-Identifier to source files2013-07-24T13:44:38ZWolfgang Denkwd@denx.de2013-07-08T07:37:19Zurn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
x86: Support tracing function2013-06-26T14:18:56ZSimon Glasssjg@chromium.org2013-06-11T18:14:52Zurn:sha1:d8819f94d58d8c94c619431bc34232a52b2d9a6b
Some changes are needed to x86 timer functions to support tracing. Add
these so that the feature works correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Re-enable PCAT timer 2 for beeping2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:39Zurn:sha1:d0b6f247a1e7ffd06d931ca4088426134dc4e546
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Add TSC timer2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:36Zurn:sha1:e761ecdbb83e3151ffea5b531523256c57e62527
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>