u-boot.git/arch/x86/lib/tsc_timer.c, branch v2015.01

x86: Allow timer calibration to work on ivybridge

2014-11-21T06:24:12Z

Unfortunately MSR_FSB_FREQ is not available on this CPU, and the PIT method seems to take up to 50ms which is much too long. For this CPU we know the frequency, so add another special case for now. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Save TSC frequency in the global data

2014-11-21T06:24:10Z

Return the saved TSC frequency in get_tbclk_mhz(). Signed-off-by: Bin Meng Acked-by: Simon Glass Tested-by: Simon Glass

x86: Add quick TSC calibration via PIT

2014-11-21T06:24:10Z

Use the same way that Linux does for quick TSC calibration via PIT when calibration via MSR fails. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: Do TSC MSR calibration only for known/supported CPUs

2014-11-21T06:24:10Z

Using MSR_PLATFORM_INFO (0xCE) to calibrate TSR will cause #GP on processors which do not have this MSR. Instead only doing the MSR calibration for known/supported CPUs. Signed-off-by: Bin Meng Acked-by: Simon Glass Tested-by: Simon Glass

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24T13:44:38Z

Signed-off-by: Wolfgang Denk [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini

x86: Support tracing function

2013-06-26T14:18:56Z

Some changes are needed to x86 timer functions to support tracing. Add these so that the feature works correctly. Signed-off-by: Simon Glass

x86: Re-enable PCAT timer 2 for beeping

2013-05-13T20:33:21Z

While we don't want PCAT timers for timing, we want timer 2 so that we can still make a beep. Re-purpose the PCAT driver for this, and enable it in coreboot. Signed-off-by: Simon Glass

x86: Add TSC timer

2013-05-13T20:33:21Z

This timer runs at a rate that can be calculated, well over 100MHz. It is ideal for accurate timing and does not need interrupt servicing. Tidy up some old broken and unneeded implementations at the same time. To provide a consistent view of boot time, we use the same time base as coreboot. Use the base timestamp supplied by coreboot as U-Boot's base time. Signed-off-by: Simon Glass base Signed-off-by: Simon Glass