u-boot.git/arch/x86/lib, branch v2014.01Unnamed repository; edit this file 'description' to name the repository.http://cgit.235523.xyz/u-boot.git/atom/arch/x86/lib?h=v2014.012013-11-01T15:42:12Zx86: convert makefiles to Kbuild style2013-11-01T15:42:12ZMasahiro Yamadayamada.m@jp.panasonic.com2013-10-21T02:53:34Zurn:sha1:3954b739b32de7c634b21496c229d30a085a19e2
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Add GPL-2.0+ SPDX-License-Identifier to source files2013-07-24T13:44:38ZWolfgang Denkwd@denx.de2013-07-08T07:37:19Zurn:sha1:1a4596601fd395f3afb8f82f3f840c5e00bdd57a
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTM2013-07-16T22:44:30ZDirk Eibacheibach@gdsys.de2013-06-26T13:55:16Zurn:sha1:b8eee4354f33b9810d929b6f7df74238b538e5a8
MAKEALL is fine for ppc4xx and mpc85xx.
Run checks were done on our controlcenterd hardware.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Andy Fleming <afleming@freescale.com>
blackfin: x86: bootm: Handle PREP stage of bootm2013-07-12T14:32:39ZSimon Glasssjg@chromium.org2013-07-11T06:08:09Zurn:sha1:7af26b1669b75a02e1cfaa68ac526897e790af84
The OS function is now always called with the PREP stage. Adjust the
remaining bootm OS functions to deal with this correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Support tracing function2013-06-26T14:18:56ZSimon Glasssjg@chromium.org2013-06-11T18:14:52Zurn:sha1:d8819f94d58d8c94c619431bc34232a52b2d9a6b
Some changes are needed to x86 timer functions to support tracing. Add
these so that the feature works correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Correct missing local variable in bootm2013-06-26T14:16:41ZSimon Glasssjg@chromium.org2013-06-11T18:14:34Zurn:sha1:bdc7d5cda3510d01153d75d0ceae38466ff865c0
Enabling FIT produces a compile error. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Re-enable PCAT timer 2 for beeping2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:39Zurn:sha1:d0b6f247a1e7ffd06d931ca4088426134dc4e546
While we don't want PCAT timers for timing, we want timer 2 so that we can
still make a beep. Re-purpose the PCAT driver for this, and enable it in
coreboot.
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Remove ISR timer2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:38Zurn:sha1:f9083bbe784cb03940b094afe4db0bf94f312f2b
This is no longer used since we prefer the more accurate TSC timer, so
remove the dead code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>
x86: Add TSC timer2013-05-13T20:33:21ZSimon Glasssjg@chromium.org2013-04-17T16:13:36Zurn:sha1:e761ecdbb83e3151ffea5b531523256c57e62527
This timer runs at a rate that can be calculated, well over 100MHz. It is
ideal for accurate timing and does not need interrupt servicing.
Tidy up some old broken and unneeded implementations at the same time.
To provide a consistent view of boot time, we use the same time
base as coreboot. Use the base timestamp supplied by coreboot
as U-Boot's base time.
Signed-off-by: Simon Glass <sjg@chromium.org>base
Signed-off-by: Simon Glass <sjg@chromium.org>
x86: Rationalise kernel booting logic and bootstage2013-05-13T20:33:20ZSimon Glasssjg@chromium.org2013-04-17T16:13:35Zurn:sha1:7949703a9582ec60cf841c595acd3bbe86933cd3
The 'Starting linux' message appears twice in the code, but both call
through the same place. Unify these and add calls to bootstage to
mark the occasion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Spang <spang@chromium.org>
Acked-by: Graeme Russ <graeme.russ@gmail.com>