u-boot.git/arch/x86/lib, branch v2015.04

x86: Define macros for pci configuration space access

2015-02-06T19:07:40Z

Move PCI_REG_ADDR and PCI_REG_DATA from arch/x86/lib/pci_type1.c to arch/x86/include/asm/pci.h, also define PCI_CFG_EN so that these macros can be used for pci configuration space access. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: Allow a UART to be set up before the FSP is ready

2015-02-06T19:07:38Z

Since the FSP is a black box it helps to have some sort of debugging available to check its inputs. If the debug UART is in use, set it up after CAR is available. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Remove unnecessary casts and fix comment typos

2015-02-06T19:07:37Z

Tidy up the FSP support code a little. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: mmc: Move common FSP functions into a common file

2015-02-06T19:07:36Z

Since these board functions seem to be the same for all boards which use FSP, move them into a common file. We can adjust this later if future FSPs need more flexibility. This creates a generic PCI MMC device. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng

x86: Make CAR and DRAM FSP code common

2015-02-06T05:16:44Z

For now this code seems to be the same for all FSP platforms. Make it common until we see what differences are required. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng

x86: Adjust the FSP types slightly

2015-02-06T05:16:43Z

To avoid casts, find_fsp_header() should return a pointer. Add asmlinkage to two API functions which use that convention. UPD_TERMINATOR is common so move it into a common file. Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng

x86: Move common FSP code into a common location

2015-02-06T05:16:43Z

Signed-off-by: Simon Glass Reviewed-by: Bin Meng Tested-by: Bin Meng

x86: Test mtrr support flag before accessing mtrr msr

2015-01-24T00:24:55Z

On some x86 processors (like Intel Quark) the MTRR registers are not supported. This is reflected by the CPUID (EAX 01H) result EDX[12]. Accessing the MTRR registers on such processors will cause #GP so we must test the support flag before accessing MTRR MSRs. Signed-off-by: Bin Meng Acked-by: Simon Glass

x86: Fix out of bounds irq handlers access

2015-01-24T00:24:54Z

Using coreboot-x86_defconfig, the following error occurred prior to this modification: CC arch/x86/lib/interrupts arch/x86/lib/interrupts.c: In function ‘do_irqinfo’: arch/x86/lib/interrupts.c:134:24: error: iteration 16u invokes undefined behavior [-Werror=aggressive-loop-optimizations] if (irq_handlers[irq].handler != NULL) { ^ arch/x86/lib/interrupts.c:133:2: note: containing loop for (irq = 0; irq <= CONFIG_SYS_NUM_IRQS; irq++) { ^ cc1: all warnings being treated as errors scripts/Makefile.build:275: recipe for target 'arch/x86/lib/interrupts.o' failed make[1]: *** [arch/x86/lib/interrupts.o] Error 1 Makefile:1093: recipe for target 'arch/x86/lib' failed make: *** [arch/x86/lib] Error 2 Change-Id: I3572a822081b72ab760f1eb99442e1161d3d167e Signed-off-by: Sebastien Ronsse Acked-by: Simon Glass

x86: Allow a hardcoded TSC frequency provided by Kconfig

2015-01-13T15:25:02Z

By default U-Boot automatically calibrates TSC running frequency via MSR and PIT. The calibration may not work on every x86 processor, so a new Kconfig option CONFIG_TSC_CALIBRATION_BYPASS is introduced to allow bypassing the calibration and assign a hardcoded TSC frequency CONFIG_TSC_FREQ_IN_MHZ. Normally the bypass should be turned on in a simulation environment like qemu. Signed-off-by: Bin Meng Acked-by: Simon Glass