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<title>u-boot.git/arch/x86, branch v2011.12</title>
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<updated>2011-11-29T10:31:24Z</updated>
<entry>
<title>x86: Wrap small helper functions from libgcc to avoid an ABI mismatch</title>
<updated>2011-11-29T10:31:24Z</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@chromium.org</email>
</author>
<published>2011-11-16T23:01:37Z</published>
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<id>urn:sha1:36b2409a3d469b5133d105fa12089429a1900bde</id>
<content type='text'>
When gcc compiles some 64 bit operations on a 32 bit machine, it generates
calls to small functions instead of instructions which do the job directly.
Those functions are defined in libgcc and transparently provide whatever
functionality was necessary. Unfortunately, u-boot can be built with a
non-standard ABI when libgcc isn't. More specifically, u-boot uses
-mregparm. When the u-boot and libgcc are linked together, very confusing
bugs can crop up, for instance seemingly normal integer division or modulus
getting the wrong answer or even raising a spurious divide by zero
exception.

This change borrows (steals) a technique and some code from coreboot which
solves this problem by creating wrappers which translate the calling
convention when calling the functions in libgcc. Unfortunately that means
that these instructions which had already been turned into functions have
even more overhead, but more importantly it makes them work properly.

To find all of the functions that needed wrapping, u-boot was compiled
without linking in libgcc. All the symbols the linker complained were
undefined were presumed to be the symbols that are needed from libgcc.
These were a subset of the symbols covered by the coreboot code, so it was
used unmodified.

To prevent symbols which are provided by libgcc but not currently wrapped
(or even known about) from being silently linked against by code generated
by libgcc, a new copy of libgcc is created where all the symbols are
prefixed with __normal_. Without being purposefully wrapped, these symbols
will cause linker errors instead of silently introducing very subtle,
confusing bugs.

Another approach would be to whitelist symbols from libgcc and strip out
all the others. The problem with this approach is that it requires the
white listed symbols to be specified three times, once for objcopy, once so
the linker inserts the wrapped, and once to generate the wrapper itself,
while this implementation needs it to be listed only twice. There isn't
much tangible difference in what each approach produces, so this one was
preferred.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Import the glibc memset implementation</title>
<updated>2011-11-29T10:31:17Z</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@chromium.org</email>
</author>
<published>2011-11-14T14:47:18Z</published>
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<id>urn:sha1:dbaef6ef33912a863f9fb550857028fb96e42c59</id>
<content type='text'>
The new implementation is about twice as fast as the old. This is from
glibc-2.14, sysdeps/i386/memset.c.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Fix a few recently added bugs</title>
<updated>2011-11-29T10:30:51Z</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@chromium.org</email>
</author>
<published>2011-11-16T23:32:50Z</published>
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<id>urn:sha1:60a9b6bfddbe1e3ae280fe5422ccd283bc31a591</id>
<content type='text'>
Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Don't relocate symbols which point to things that aren't relocated</title>
<updated>2011-11-29T10:30:44Z</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@chromium.org</email>
</author>
<published>2011-11-12T16:34:48Z</published>
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<id>urn:sha1:769db03a4a4ea1dc7e43c089c2227a0c8b4ffcbc</id>
<content type='text'>
This change adds an upper bound for symbols which are fixed up after u-boot
is relocated into RAM. This way portions that are left at their original
location can be referred to without having to manually fix up any pointers.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Fix how the location of the realmode and bios blobs are calculated</title>
<updated>2011-11-29T10:30:38Z</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@google.com</email>
</author>
<published>2011-11-12T16:31:18Z</published>
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<id>urn:sha1:03228b26d5d999b05ea6e5946ad0375715b9043c</id>
<content type='text'>
There are two blobs embedded into the u-boot image which are linked to run
at an address which is different from where they actually end up in the
ROM, one called "realmode" and one called "bios". There are realmode_setup
and bios_setup functions which prepare those blobs by copying them into the
location they're supposed to run from, among other things.

During u-boot relocation from ROM to RAM, the text and a few data segments
are copied over. The realmode and bios sections are not copied, and so the
only place they can be read from is their original location in the ROM.
Looking specifically at the bios blob, there are symbols defined in the
linker script called __bios_start and __bios_size which are defined to be
the start and size of the blob in the ROM.

In the bios_setup function, there seem to be two mistakes happening. First,
the offset from ROM to RAM is being added to __bios_start which implies that
this code expects to use the copy moved to RAM. No such copy is made, so
that's wrong. More subtly, when u-boot relocates itself, it goes through
all of the relocations stored in .rel.dyn and fixes them up. This has the
effect of transforming the __bios_start reference in bios_setup so that it
refers to the version in RAM (if one existed) instead of the one in ROM. To
correct for that, the offset actually needs to be subtracted out again to
translate the address back into the ROM.

The net effect is that for both blobs, a + needs to be changed to a -.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Misc cleanups</title>
<updated>2011-11-29T10:10:12Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:23Z</published>
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<id>urn:sha1:2f0e0cd246c2279883062fcfe90cd705f05bcb31</id>
<content type='text'>
Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Misc PCI touchups</title>
<updated>2011-11-29T10:10:08Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:22Z</published>
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<id>urn:sha1:1cfcf0370132315d6eee375afdf7207ff60a07e0</id>
<content type='text'>
Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Ensure IDT and GDT remain 16-byte aligned post relocation</title>
<updated>2011-11-29T10:10:01Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:21Z</published>
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<id>urn:sha1:303418cc97c0922cdbbc328e6d9111bd9a84d1c7</id>
<content type='text'>
Some CPUs have strict alignment requirements for these tables

Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Provide more configuration granularity</title>
<updated>2011-11-29T10:09:52Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:20Z</published>
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<id>urn:sha1:a76fc70ee190416e0c161efebdb955a5fac904d3</id>
<content type='text'>
Planned future ports requires more granularity for some options

Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Add multiboot header</title>
<updated>2011-11-29T10:08:02Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2011-11-08T02:33:19Z</published>
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<id>urn:sha1:a206cc23431474a9890f0301f02f50ad3dc9b062</id>
<content type='text'>
By adding a multiboot header, U-Boot can be loaded by GRUB2. Using GRUB2 to
bootstrap U-Boot is useful for using an existing BIOS to get an initial
U-Boot port up and running before implementing the low-level reset vector
code, SDRAM init, etc. and overwriting the BIOS

Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
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