Commit 460c2ce3 "MPC5200: workaround data corruption for unaligned
local bus accesses" fixed the problem for MPC5200 only, but MPC512x is
affected as well, so apply the same fix here, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>

Signed-off-by: Wolfgang Denk <wd@denx.de>

The MPC5200 has a nasty problem that will cause silent data corruption
when performing unaligned 16 or 32 byte accesses when reading from the
local bus - typically this affects reading from flash. The problem can
be easily shown:

=> md fc0c0000 10
fc0c0000: 323e4337 01626f6f 74636d64 3d72756e    2>C7.bootcmd=run
fc0c0010: 206e6574 5f6e6673 00626f6f 7464656c     net_nfs.bootdel
fc0c0020: 61793d35 00626175 64726174 653d3131    ay=5.baudrate=11
fc0c0030: 35323030 00707265 626f6f74 3d656368    5200.preboot=ech
=> md fc0c0001 10
fc0c0001: 65636801 00000074 0000003d 00000020    ech....t...=...
fc0c0011: 0000005f 00000000 00000074 00000061    ..._.......t...a
fc0c0021: 00000000 00000064 00000065 00000035    .......d...e...5
fc0c0031: 00000000 00000062 0000003d 0000006f    .......b...=...o
=> md.w fc0c0001 10
fc0c0001: 0000 3701 0000 6f74 0000 643d 0000 6e20    ..7...ot..d=..n
fc0c0011: 0000 745f 0000 7300 0000 6f74 0000 6c61    ..t_..s...ot..la

This commit implements a workaround at least for the most blatant
problem: using memcpy() from NOR flash. We rename the assembler
routine into __memcpy() and provide a wrapper, which will use a
byte-wise copy loop for unaligned source or target addresses when
reading from NOR flash, and branch to the optimized __memcpy()
in all other cases, thus minimizing the performance impact.

Tested on lite5200b and TQM5200S.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

ATAG_VIDEOLFB is not used anywhere.
The belowing warning is occurred due to this ATAG.

[    0.000000] Ignoring unrecognised tag 0x54410008

This patch fixed it.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Martin Krause <Martin.Krause@tqs.de>

Orion5x MPP and GPIO setting code had writel arguments
the wrong way around. Fixed and tested.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>

Signed-off-by: Terry Lv <r65388@freescale.com>

Fix commit message and code formatting.

Signed-off-by: Wolfgang Denk <wd@denx.de>

The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
in Procedure Call Standard for the ARM Architecture:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html

Unaligned SP also causes the problem with variable-length arrays
allocation when VLA address becomes less than stack pointer during
aligning of this address, so the next 'push' in the stack overwrites
first 4 bytes of VLA.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Tested on tx25(mx25), imx27lite(mx27), qong(mx31) and trab(s3c2400)
Tested-by: Wolfgang Denk <wd@denx.de>

The push / pop instructions used in this file are available only with
more recent tool chains:

cache.S: Assembler messages:
cache.S:133: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:160: Error: bad instruction `pop {r1,r2,r3,pc}'
cache.S:164: Error: bad instruction `push {r0,r1,r2,lr}'
cache.S:191: Error: bad instruction `pop {r1,r2,r3,pc}'

Change push/pop into stmfd/ldmfd instructions to support older
versions of binutils as well.

I verified that the modified source code generates exactly the same
binary code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Tom Rix <tom@bumblecow.com>