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<title>u-boot.git/arch, branch v2013.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>powerpc/mpc85xx:Disable Debug TLB entry for non-minimal SPL</title>
<updated>2013-07-16T22:44:30+00:00</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar@freescale.com</email>
</author>
<published>2013-07-05T06:29:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2a6936059a1f393d828274bf5d33dd54c0a3c882'/>
<id>2a6936059a1f393d828274bf5d33dd54c0a3c882</id>
<content type='text'>
CONFIG_SPL_BUILD creates debug TLB entry, so disable it before init_tlbs.

CONFIG_SPL_INIT_MINIMAL never creates any debug TLB entry, so no need
of disable_tlb().

Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
CONFIG_SPL_BUILD creates debug TLB entry, so disable it before init_tlbs.

CONFIG_SPL_INIT_MINIMAL never creates any debug TLB entry, so no need
of disable_tlb().

Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Build arch/$ARCH/lib/bootm.o depending on CONFIG_CMD_BOOTM</title>
<updated>2013-07-16T22:44:30+00:00</updated>
<author>
<name>Dirk Eibach</name>
<email>eibach@gdsys.de</email>
</author>
<published>2013-06-26T13:55:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8eee4354f33b9810d929b6f7df74238b538e5a8'/>
<id>b8eee4354f33b9810d929b6f7df74238b538e5a8</id>
<content type='text'>
MAKEALL is fine for ppc4xx and mpc85xx.
Run checks were done on our controlcenterd hardware.

Signed-off-by: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
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<pre>
MAKEALL is fine for ppc4xx and mpc85xx.
Run checks were done on our controlcenterd hardware.

Signed-off-by: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm:exynos:fix: Fix clock calculation for Exynos4210 based targets.</title>
<updated>2013-07-16T13:20:16+00:00</updated>
<author>
<name>Łukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2013-07-12T17:08:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f4eaf88e6d48ab2d0f978a25b916b92acdfd1df4'/>
<id>f4eaf88e6d48ab2d0f978a25b916b92acdfd1df4</id>
<content type='text'>
Provide proper setting for the APLL fout frequency calculation for
Exynos4 based targets (especially Exynos4210 - Trats board).

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Acked-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Provide proper setting for the APLL fout frequency calculation for
Exynos4 based targets (especially Exynos4210 - Trats board).

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Cc: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Acked-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm</title>
<updated>2013-07-12T14:36:48+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-07-12T14:36:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fbbbc86e8ebac4f42f4ca39ceba80cea27c983bc'/>
<id>fbbbc86e8ebac4f42f4ca39ceba80cea27c983bc</id>
<content type='text'>
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
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<pre>
Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>blackfin: x86: bootm: Handle PREP stage of bootm</title>
<updated>2013-07-12T14:32:39+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-07-11T06:08:09+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7af26b1669b75a02e1cfaa68ac526897e790af84'/>
<id>7af26b1669b75a02e1cfaa68ac526897e790af84</id>
<content type='text'>
The OS function is now always called with the PREP stage. Adjust the
remaining bootm OS functions to deal with this correctly.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The OS function is now always called with the PREP stage. Adjust the
remaining bootm OS functions to deal with this correctly.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Tegra: USB: EHCI: Add support for Tegra30/Tegra114</title>
<updated>2013-07-11T21:15:15+00:00</updated>
<author>
<name>Jim Lin</name>
<email>jilin@nvidia.com</email>
</author>
<published>2013-06-21T11:05:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7e44d9320ed4a9994b97eb1c9b2efd04491ff431'/>
<id>7e44d9320ed4a9994b97eb1c9b2efd04491ff431</id>
<content type='text'>
Tegra30 and Tegra114 are compatible except PLL parameters.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

Signed-off-by: Jim Lin &lt;jilin@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
Tegra30 and Tegra114 are compatible except PLL parameters.

Tested on Tegra30 Cardhu, and Tegra114 Dalmore
platforms. All works well.

Signed-off-by: Jim Lin &lt;jilin@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ARM: Tegra: FDT: Add USB EHCI function for T30/T114</title>
<updated>2013-07-11T21:15:15+00:00</updated>
<author>
<name>Jim Lin</name>
<email>jilin@nvidia.com</email>
</author>
<published>2013-06-21T11:05:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=56867d88c45f7345dc6bf7340ee70b69688e3e9a'/>
<id>56867d88c45f7345dc6bf7340ee70b69688e3e9a</id>
<content type='text'>
Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.

Signed-off-by: Jim Lin &lt;jilin@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add DT node for USB EHCI function.
Add support for T30-Cardhu, T30-Beaver, T114-Dalmore boards.

Signed-off-by: Jim Lin &lt;jilin@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Tested-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'</title>
<updated>2013-07-10T18:40:47+00:00</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-07-10T18:40:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=630aacb0859c6e26b2b0311d8e245da5e5b8ac67'/>
<id>630aacb0859c6e26b2b0311d8e245da5e5b8ac67</id>
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<pre>
</pre>
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</content>
</entry>
<entry>
<title>bootm: Clean up bootz_setup() function</title>
<updated>2013-07-10T13:15:14+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-07-04T20:26:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a5266d6b5d3d94bbbf7fed572a96aa0e90ff4199'/>
<id>a5266d6b5d3d94bbbf7fed572a96aa0e90ff4199</id>
<content type='text'>
This function has no prototype in the headers and passes void * around, thus
requiring several casts. Tidy this up.

- Add new patch to clean up bootz_setup() function

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This function has no prototype in the headers and passes void * around, thus
requiring several casts. Tidy this up.

- Add new patch to clean up bootz_setup() function

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: exynos: fix clock calculation</title>
<updated>2013-07-09T07:15:30+00:00</updated>
<author>
<name>Minkyu Kang</name>
<email>mk7.kang@samsung.com</email>
</author>
<published>2013-07-05T10:08:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e161f60f4df044e1815f4639795fce13f7b3bee3'/>
<id>e161f60f4df044e1815f4639795fce13f7b3bee3</id>
<content type='text'>
There are differnce with clock calcuation by cpu variations.
This patch will fix it according to user manual.

Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Rajeshwari Shinde &lt;rajeshwari.s@samsung.com&gt;
</content>
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<pre>
There are differnce with clock calcuation by cpu variations.
This patch will fix it according to user manual.

Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Rajeshwari Shinde &lt;rajeshwari.s@samsung.com&gt;
</pre>
</div>
</content>
</entry>
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