u-boot.git/arch, branch v2013.07-rc1

Merge branch 'master' of git://git.denx.de/u-boot-arm

2013-06-13T19:16:15Z

Small conflict over DRA7XX updates and adding SRAM_SCRATCH_SPACE_ADDR Conflicts: arch/arm/include/asm/arch-omap5/omap.h Signed-off-by: Tom Rini

arm: pxa: config option for PXA270 turbo mode

2013-06-12T20:24:12Z

PXA270 CPU has turbo mode. The mode is 2.5 times faster than the default run mode. Activating the mode early significantly speeds up boot process. Signed-off-by: Sergey Yanovich

powerpc: fix 8xx and 82xx type-punning warnings with GCC 4.7

2013-06-11T20:01:45Z

C99's strict aliasing rules are insane to use in low-level code such as a bootloader, but as Wolfgang has rejected -fno-strict-aliasing in the past, add a union so that 16-bit accesses can be performed. Compile-tested only. Signed-off-by: Scott Wood Acked-by: Wolfgang Denk

cosmetic: arm: fix comments in arch/arm/lib/crt0.S

2013-06-10T19:24:22Z

Signed-off-by: Masahiro Yamada

arm: da830: moved pinmux configurations to the arch tree

2013-06-10T12:54:46Z

Move pinmux configurations for the DA830 SoCs from board file to the arch tree so that it can be used for all da830 based devices. Also, avoids duplicate pinmuxing in case of NAND. Signed-off-by: Vishwanathrao Badarkhe, Manish Reviewed-by: Tom Rini Acked-by: Christian Riesch

OMAP5: Enable access to auxclk registers

2013-06-10T12:54:46Z

auxclk0 and auxclk1 are utilized on some OMAP5 boards. Define the infrastructure needed for accessing them without using magic numbers. Also remove unrelated TPS62361 defines from clocks.h Signed-off-by: Lubomir Popov

arm: Remove OMAP2420H4 and all omap24xx support

2013-06-10T12:43:19Z

The omap2420H4 was the only mainline omap24xx board. Prior to being fixed by Jon Hunter in time for v2013.04 it had been functionally broken for a very long time. Remove this board as there's not been interest in it in U-Boot for quite a long time. Signed-off-by: Tom Rini

ARM: DRA7xx: EMIF: Change settings required for EVM board

2013-06-10T12:43:10Z

DRA7 EVM board has the below configuration. Adding the settings for the same here. 2Gb_1_35V_DDR3L part * 2 on EMIF1 2Gb_1_35V_DDR3L part * 4 on EMIF2 Signed-off-by: Sricharan R Signed-off-by: Lokesh Vutla

ARM: DRA7xx: clocks: Update PLL values

2013-06-10T12:43:10Z

Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla Signed-off-by: Sricharan R

ARM: DRA7xx: Update pinmux data

2013-06-10T12:43:10Z

Updating pinmux data as specified in the latest DM Signed-off-by: Lokesh Vutla Signed-off-by: Balaji T K