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<title>u-boot.git/arch, branch v2014.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>Merge branch 'u-boot/master' into 'u-boot-arm/master'</title>
<updated>2014-04-08T07:25:08+00:00</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-04-08T07:25:08+00:00</published>
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<content type='text'>
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h
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<pre>
Conflicts:
	arch/arm/cpu/arm926ejs/mxs/Makefile
	include/configs/trats.h
	include/configs/trats2.h
	include/mmc.h
</pre>
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</content>
</entry>
<entry>
<title>arm64 patch: gicv3 support</title>
<updated>2014-04-07T22:15:12+00:00</updated>
<author>
<name>David Feng</name>
<email>fenghua@phytium.com.cn</email>
</author>
<published>2014-03-14T06:26:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c71645ad2bd5179ad21e2501c26f574e9688f02a'/>
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This patch add gicv3 support to uboot armv8 platform.

Changes for v2:
  - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
  - move smp_kick_all_cpus() from gic.S to start.S, it would be
    implementation dependent.
  - Each core initialize it's own ReDistributor instead of master
    initializeing all ReDistributors. This is advised by arnab.basu
    &lt;arnab.basu@freescale.com&gt;.

Signed-off-by: David Feng &lt;fenghua@phytium.com.cn&gt;
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<pre>
This patch add gicv3 support to uboot armv8 platform.

Changes for v2:
  - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S
  - move smp_kick_all_cpus() from gic.S to start.S, it would be
    implementation dependent.
  - Each core initialize it's own ReDistributor instead of master
    initializeing all ReDistributors. This is advised by arnab.basu
    &lt;arnab.basu@freescale.com&gt;.

Signed-off-by: David Feng &lt;fenghua@phytium.com.cn&gt;
</pre>
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</content>
</entry>
<entry>
<title>bootstage: arm: fix fdt stashing code</title>
<updated>2014-04-07T21:03:13+00:00</updated>
<author>
<name>Mela Custodio</name>
<email>sessyargc@gmail.com</email>
</author>
<published>2014-02-19T15:16:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=91290cf728dd871c86f370119899789398d956af'/>
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The conditional is using a variable that is not defined.

Signed-off-by: Rommel G Custodio &lt;sessyargc+u-boot@gmail.com&gt;
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<pre>
The conditional is using a variable that is not defined.

Signed-off-by: Rommel G Custodio &lt;sessyargc+u-boot@gmail.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>ARMv8: fix bug for flush data cache by set/way</title>
<updated>2014-04-07T20:27:22+00:00</updated>
<author>
<name>Leo Yan</name>
<email>leoy@marvell.com</email>
</author>
<published>2014-03-31T01:50:35+00:00</published>
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When flush the d$ with set/way instruction, it need calculate the way's
offset = log2(Associativity); but in current uboot's code, it use below
formula to calculate the offset: log2(Associativity * 2 - 1), so finally
it cannot flush data cache properly.

Signed-off-by: Leo Yan &lt;leoy@marvell.com&gt;
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<pre>
When flush the d$ with set/way instruction, it need calculate the way's
offset = log2(Associativity); but in current uboot's code, it use below
formula to calculate the offset: log2(Associativity * 2 - 1), so finally
it cannot flush data cache properly.

Signed-off-by: Leo Yan &lt;leoy@marvell.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>armv8: Flush dcache before switching to EL2</title>
<updated>2014-04-07T20:19:00+00:00</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2014-03-31T21:40:32+00:00</published>
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For ARMv8, U-boot has been running at EL3 with cache and MMU enabled.
Without proper setup for EL2, cache and MMU are both disabled (out of
reset). Before switching, we need to flush the dcache to make sure the
data is in the main memory.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
Acked-by: David.Feng &lt;fenghua@phytium.com.cn&gt;
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<pre>
For ARMv8, U-boot has been running at EL3 with cache and MMU enabled.
Without proper setup for EL2, cache and MMU are both disabled (out of
reset). Before switching, we need to flush the dcache to make sure the
data is in the main memory.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
Acked-by: David.Feng &lt;fenghua@phytium.com.cn&gt;
</pre>
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</content>
</entry>
<entry>
<title>arm: vf610: add enet1 support</title>
<updated>2014-04-07T18:15:44+00:00</updated>
<author>
<name>Marcel Ziswiler</name>
<email>marcel@ziswiler.com</email>
</author>
<published>2014-03-11T17:43:59+00:00</published>
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<id>6c81a93db700021614c6ae150f8c1c995173201f</id>
<content type='text'>
This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for
  internal (e.g. crystal-less) Ethernet clocking.

Signed-off-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
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<pre>
This patch contains several changes required for second Ethernet
(enet1/RMII1) port on vf610
- ANADIG PLL5 control definitions required for Ethernet RMII1 clock
- Secondary Ethernet (enet1) MAC RMII1 base address definition
- RMII1 iomux definitions
- VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for
  internal (e.g. crystal-less) Ethernet clocking.

Signed-off-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: vf610: add uart0 clock/iomux definitions</title>
<updated>2014-04-07T18:15:37+00:00</updated>
<author>
<name>Marcel Ziswiler</name>
<email>marcel@ziswiler.com</email>
</author>
<published>2014-03-11T17:43:58+00:00</published>
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<id>c7098965e31b6faf1a861fcca77ef7112b9bf6e4</id>
<content type='text'>
Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux
definitions for UART0 (aka. SCI0).

Signed-off-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
</content>
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<pre>
Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux
definitions for UART0 (aka. SCI0).

Signed-off-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
</pre>
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</content>
</entry>
<entry>
<title>arm: vf610: fix anadig register struct</title>
<updated>2014-04-07T18:15:29+00:00</updated>
<author>
<name>Marcel Ziswiler</name>
<email>marcel@ziswiler.com</email>
</author>
<published>2014-03-11T17:43:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=25839c01975b865f2e6a0dac056d207e9288a281'/>
<id>25839c01975b865f2e6a0dac056d207e9288a281</id>
<content type='text'>
The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl)
and further contained a too short reserved field causing further miss-
alignment (reserved_0x0C4[7]). Also, rename all the reserved fields
and using a memory offset based scheme for.

Discovered and tested by temporarily putting the following debug
instrumentation into board_init():
    struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR;
    printf("&amp;anadig-&gt;pll3_ctrl=0x%p\n", &amp;anadig-&gt;pll3_ctrl);
    printf("&amp;anadig-&gt;pll5_ctrl=0x%p\n", &amp;anadig-&gt;pll5_ctrl);

Signed-off-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
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<pre>
The anadig_reg structure started at the wrong offset (fixed by adding
reserved_0x000[4]), was missing some reserved field required for
alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl)
and further contained a too short reserved field causing further miss-
alignment (reserved_0x0C4[7]). Also, rename all the reserved fields
and using a memory offset based scheme for.

Discovered and tested by temporarily putting the following debug
instrumentation into board_init():
    struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR;
    printf("&amp;anadig-&gt;pll3_ctrl=0x%p\n", &amp;anadig-&gt;pll3_ctrl);
    printf("&amp;anadig-&gt;pll5_ctrl=0x%p\n", &amp;anadig-&gt;pll5_ctrl);

Signed-off-by: Marcel Ziswiler &lt;marcel@ziswiler.com&gt;
[stefan@agner.ch: regrouped patch]
Signed-off-by: Stefan Agner &lt;stefan@agner.ch&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>build:arm: Remove setting of CROSS_COMPILE environment variable</title>
<updated>2014-04-07T18:04:36+00:00</updated>
<author>
<name>Łukasz Majewski</name>
<email>l.majewski@samsung.com</email>
</author>
<published>2014-03-18T15:46:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=42f5e8a25ad1a7504502e7f11ff4d563f1d6f1dd'/>
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<content type='text'>
After Kbuild introduction, the CROSS_COMPILE environment variable has been
set to some default value (prefix arm-linux-).

This shall be removed since it breaks building u-boot for native arm target
(like qemu ARM).
Moreover not all compilers have arm-linux- prefix.

Additionally the u-boot cross compiles with CROSS_COMPILE= set explicitly-
e.g.:
CROSS_COMPILE=/ .... /arm-v7a-linux-gnueabi- make

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Cc: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
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<pre>
After Kbuild introduction, the CROSS_COMPILE environment variable has been
set to some default value (prefix arm-linux-).

This shall be removed since it breaks building u-boot for native arm target
(like qemu ARM).
Moreover not all compilers have arm-linux- prefix.

Additionally the u-boot cross compiles with CROSS_COMPILE= set explicitly-
e.g.:
CROSS_COMPILE=/ .... /arm-v7a-linux-gnueabi- make

Signed-off-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Cc: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'</title>
<updated>2014-04-07T17:13:42+00:00</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-04-07T17:13:42+00:00</published>
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</pre>
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