The pad settings for DISP0_DATA02 and DISP0_DAT10 were not
set in the same way as DISP0_DAT00-23, causing much flicker
in parallel RGB displays on Dual-Lite and Solo processors.

These settings now match the i.MX6 Dual and Quad core versions.

Note that this fixes a regression in commit b47abc3 and that
this is the second time we've had a regression on these two
pads (See commit e654ddf).

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>

Newer AM437x silicon requires us to explicitly power up
the USB2 PHY. By implementing usb_phy_power() we can
achieve that.

Signed-off-by: Felipe Balbi <balbi@ti.com>

Commit 3d622b78 (mx6: soc: Introduce set_ldo_voltage()) introduces
set_ldo_voltage() function that can be used to set the voltages
of any of the three LDO regulators controlled by the PMU_REG_CORE register.

Prior to this commit there was a single set_vddsoc() which only configured the
VDDSOC regulator.

Update the comments to align with the new set_ldo_voltage() implementation.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

DIV_SELECT is used as Fout = Fin * div_select / 2.0, so we should do
the shift after the multiply to avoid rounding errors

Signed-off-by: Andre Renaud <andre@bluewatersys.com>

Fixes a bug when objcopy doesn't put .dtb.init.rodata section to resulting
u-boot.bin, so u-boot was unable to find embedded DTB.

Since ARRAY_SIZE macro is defined in include/common.h,
re-defining it in arch-specific files is redundant.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Sonic Zhang <sonic.zhang@analog.com>

Add invalidate_dcache_range() and flush_dcache_range() for the blackfin
architecture. Such functions already exist on this arch with different
names, so just forward the call.

This fixes the build of bf609-ezkit board as it uses
drivers/net/designware.c which requires the above functions.

Cc: Sonic Zhang <sonic.adi@gmail.com>, Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vasili Galka <vvv444@gmail.com>

The csarX and cscrX registers in the fbcs_t struct are 16-bit for
CONFIG_M5235 and 32-bit wide otherwise. The code in cpu_init.c
accessed them always as 32-bit, effectively creating a wrong memory
access on M5235. Fixed that by choosing out_be16/out_be32 depending
on whether CONFIG_M5235 is defined or not.

Cc: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Vasili Galka <vvv444@gmail.com>