u-boot.git/arch, branch v2015.10-rc2

pci: mvebu: Add PCIe driver

2015-08-17T16:49:43Z

This adds a PCI driver for the controllers found on Marvell MVEBU SoCs. Besides the driver, this patch also removes the statically defined PCI MBUS windows. As they are not needed anymore, since this PCIe driver now creates the windows dynamically. Tested on Armada XP db-mv784mp-gp eval board using an Intel E1000 PCIe card in all 3 PCIe slots. And on the Armada 38x db-88f6820-gp eval board using this Intel E1000 PCIe card in the PCIe 0 slot. This port was done in cooperation with Anton Schubert. Signed-off-by: Anton Schubert Signed-off-by: Stefan Roese Cc: Luka Perkov Cc: Dirk Eibach

arm: mvebu: Add complete SDRAM ECC scrubbing

2015-08-17T16:49:33Z

This patch introduces the SDRAM scrubbing for ECC enabled board to fill/initialize the ECC bytes. This is done via the XOR engine to speed up the process. The scrubbing is a 2-stage process: 1) SPL scrubs the area 0 - 0x100.0000 (16MiB) for the main U-Boot 2) U-Boot scrubs the remaining SDRAM area(s) Signed-off-by: Stefan Roese Cc: Luka Perkov

arm: mvebu: dram.c: Rework dram_init() and dram_init_banksize()

2015-08-17T16:49:29Z

Rework these functions so that dram_init_banksize() does not call dram_init() again. It only needs to set the banksize values in the bdinfo struct. Make sure to also clip the size of the last bank if it exceeds the maximum allowed value of 3 GiB (0xc000.0000). Otherwise other address windows (e.g. PCIe) will overlap with this memory window. Signed-off-by: Stefan Roese Cc: Luka Perkov

arm: mvebu: Display ECC enabled / disabled upon bootup

2015-08-17T16:49:19Z

This patch adds "(ECC enabled)" or "(ECC disabled)" to the DRAM bootup text. Making it easier for board with SPD DIMM's to see, if ECC is enabled or not. Signed-off-by: Stefan Roese Cc: Luka Perkov

arm: mvebu: Enable USB EHCI support on Armada XP

2015-08-17T16:49:07Z

This patch enables the USB EHCI support for the Marvell Armada XP (AXP) SoCs. In compatism to the Armada 38x (A38x), the AXP needs to configure the USB PLL and the USB PHY's specifically in U-Boot. The A38x has done this already in the bin_hdr (SPL U-Boot). Without this, accessing the controller registers in U-Boot or Linux will hang the CPU. Additionally, the AXP uses a different USB EHCI base address. This patch also takes care of this by runtime SoC detection in the Marvell EHCI driver. Signed-off-by: Stefan Roese Signed-off-by: Anton Schubert Cc: Marek Vasut Cc: Luka Perkov

arm: mvebu: Enable NAND controller on MVEBU SoC's

2015-08-17T16:49:02Z

This patch enables the NAND controller on the Armada XP/38x and provides a new function that returns the NAND controller input clock. This function will be used by the MVEBU NAND driver. As part of this patch, the multiple BIT macro definitions are moved to a common place in soc.h. Signed-off-by: Stefan Roese Cc: Peter Morrow Cc: Luka Perkov

arm: mvebu: Disable MBUS error propagation

2015-08-17T16:48:57Z

Accessing MBUS windows not backed-up by e.g. PCIe devices will hang the SoC. Disable MBUS error propagation back to CPU allows to read 0xffffffff instead of hanging the SoC. Signed-off-by: Stefan Roese Cc: Luka Perkov

arm: mvebu: Flush caches and disable MMU only on A38x

2015-08-17T16:48:52Z

Only with disabled MMU its possible to switch the base register address on Armada 38x. Without this the SDRAM located at >= 0x4000.0000 is also not accessible, as its still locked to cache. So to fully release / unlock this area from cache, we need to first flush all caches, then disable the MMU and disable the L2 cache. On Armada XP this does not seem to be needed. Even worse, with this code added, I sometimes see strange input charactes loss from the console. Signed-off-by: Stefan Roese Cc: Luka Perkov

arm: mvebu: Setup the MBUS bridge registers

2015-08-17T16:48:46Z

With this patch, the MBUS bridge registers (base and size) are configured upon each call to mbus_dt_setup_win(). This is needed, since the board code can also call this function in later boot stages. As done in the maxbcm board. This is needed to fix a problem with the secondary CPU's not booting in Linux on AXP. Signed-off-by: Stefan Roese Cc: Peter Morrow Cc: Luka Perkov

arm: mvebu: Change MBUS base addresses and sizes

2015-08-17T16:48:34Z

This patch changes the MBUS base addresses and sizes to use more generic names and also adds defines for the sizes. It also moves the base address to higher addresses. Signed-off-by: Stefan Roese Cc: Luka Perkov