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<entry>
<title>Merge git://git.denx.de/u-boot-rockchip</title>
<updated>2017-04-17T02:08:13+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-04-17T02:08:13+00:00</published>
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<entry>
<title>Merge git://git.denx.de/u-boot-dm</title>
<updated>2017-04-17T02:07:52+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2017-04-17T02:07:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=51f866e8da758a27af596af73466bd5f0a450c4d'/>
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<entry>
<title>rockchip: rk3399: spl: add UART0 support for SPL</title>
<updated>2017-04-15T16:18:29+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-04-01T10:59:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7ee16de58bddaa9619c264313008d7e19300b42a'/>
<id>7ee16de58bddaa9619c264313008d7e19300b42a</id>
<content type='text'>
The RK3399-Q7 ("Puma") SoM exposes UART0 as the Qseven UART (i.e. the
serial line available via standardised pins on the edge connector and
available on a RS232 connector).

To support boards (such as the RK3399-Q7) that require UART0 as a
debug console, we match CONFIG_DEBUG_UART_BASE and add the appropriate
iomux setup to the rk3399 SPL code.

As we are already touching this code, we also move the board-specific
UART setup (i.e. iomux setup) into board_debug_uart_init(). This will
be called from the debug UART init when CONFIG_DEBUG_UART_BOARD_INIT
is set.

As the RK3399 needs to use its board_debug_uart_init() function, we
have Kconfig enable it by default for RK3399 builds.

With everything set up to define CONFIG_BAUDRATE via defconfig and
with to have the SPL debug UART either on UART0 or UART2, the configs
for the RK3399 EVB are then update (the change for the RK3399-Q7 is
left for later to not cause issues on applying the change).

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
The RK3399-Q7 ("Puma") SoM exposes UART0 as the Qseven UART (i.e. the
serial line available via standardised pins on the edge connector and
available on a RS232 connector).

To support boards (such as the RK3399-Q7) that require UART0 as a
debug console, we match CONFIG_DEBUG_UART_BASE and add the appropriate
iomux setup to the rk3399 SPL code.

As we are already touching this code, we also move the board-specific
UART setup (i.e. iomux setup) into board_debug_uart_init(). This will
be called from the debug UART init when CONFIG_DEBUG_UART_BOARD_INIT
is set.

As the RK3399 needs to use its board_debug_uart_init() function, we
have Kconfig enable it by default for RK3399 builds.

With everything set up to define CONFIG_BAUDRATE via defconfig and
with to have the SPL debug UART either on UART0 or UART2, the configs
for the RK3399 EVB are then update (the change for the RK3399-Q7 is
left for later to not cause issues on applying the change).

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: pmic: Enable RK808 for rk3399 evb</title>
<updated>2017-04-15T16:13:17+00:00</updated>
<author>
<name>eric.gao@rock-chips.com</name>
<email>eric.gao@rock-chips.com</email>
</author>
<published>2017-04-10T02:41:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d3cf9eb2d87c8961408ec5aa6ebe0c54f2c13724'/>
<id>d3cf9eb2d87c8961408ec5aa6ebe0c54f2c13724</id>
<content type='text'>
For using mipi display, we need to enable lcd3v3
which supplied by rk808,so enable rk808 first.

Signed-off-by: Eric Gao &lt;eric.gao@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
For using mipi display, we need to enable lcd3v3
which supplied by rk808,so enable rk808 first.

Signed-off-by: Eric Gao &lt;eric.gao@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: i2c: Enable i2c for rk3399</title>
<updated>2017-04-15T16:13:17+00:00</updated>
<author>
<name>eric.gao@rock-chips.com</name>
<email>eric.gao@rock-chips.com</email>
</author>
<published>2017-04-10T02:17:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b644354a7c255defe0086c15ccb6b298f27a8bcf'/>
<id>b644354a7c255defe0086c15ccb6b298f27a8bcf</id>
<content type='text'>
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.

Signed-off-by: Eric Gao &lt;eric.gao@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
To enable mipi display, we need to enable pmic
rk808 first for lcd3v3 power,which use i2c0 to
communicate with soc. So enable i2c0.

Signed-off-by: Eric Gao &lt;eric.gao@rock-chips.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3399: Add missing sentinel in syscon</title>
<updated>2017-04-15T16:13:17+00:00</updated>
<author>
<name>eric.gao@rock-chips.com</name>
<email>eric.gao@rock-chips.com</email>
</author>
<published>2017-04-10T01:53:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bc8e8fe40bc57c7fe0ecafb09e180bdfefe408d5'/>
<id>bc8e8fe40bc57c7fe0ecafb09e180bdfefe408d5</id>
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when enable PMIC rk808,the system will halt at very
 early stage,log is shown as bellow.

INFO:    plat_rockchip_pmu_init(1211): pd status 3e
INFO:    BL31: Initializing runtime services
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9
time 44561b, 0 (&lt;&lt;----Just stop here)

It's caused by the absence of "{ }" in syscon_rk3399.c
,which will lead to memory overflow like below.According
 to Sysmap file ,we can find the function buck_get_value
of rk808 is just follow the compatible struct,the pointer
"of_match" point to "buck_get_value",but it is not a
struct and don't have member of compatible, In this case,
system crash. So,on the face, it looks like that rk808 is
guilty.but he is really innocent.

while (of_match-&gt;compatible) { &lt;&lt;----------
    if (!strcmp(of_match-&gt;compatible, compat)) {
    *of_idp = of_match;
    return 0;
    }
    of_match++;
}

Signed-off-by: Eric Gao &lt;eric.gao@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Tested-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
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<pre>
when enable PMIC rk808,the system will halt at very
 early stage,log is shown as bellow.

INFO:    plat_rockchip_pmu_init(1211): pd status 3e
INFO:    BL31: Initializing runtime services
INFO:    BL31: Preparing for EL3 exit to normal world
INFO:    Entry point address = 0x200000
INFO:    SPSR = 0x3c9
time 44561b, 0 (&lt;&lt;----Just stop here)

It's caused by the absence of "{ }" in syscon_rk3399.c
,which will lead to memory overflow like below.According
 to Sysmap file ,we can find the function buck_get_value
of rk808 is just follow the compatible struct,the pointer
"of_match" point to "buck_get_value",but it is not a
struct and don't have member of compatible, In this case,
system crash. So,on the face, it looks like that rk808 is
guilty.but he is really innocent.

while (of_match-&gt;compatible) { &lt;&lt;----------
    if (!strcmp(of_match-&gt;compatible, compat)) {
    *of_idp = of_match;
    return 0;
    }
    of_match++;
}

Signed-off-by: Eric Gao &lt;eric.gao@rock-chips.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Tested-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: ARM64: split RK3399-Q7 board off the RK3399-EVB board</title>
<updated>2017-04-15T16:13:17+00:00</updated>
<author>
<name>Klaus Goger</name>
<email>klaus.goger@theobroma-systems.com</email>
</author>
<published>2017-04-07T17:13:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a13110a99fffb431db60ec5b50e263d0bd2b811d'/>
<id>a13110a99fffb431db60ec5b50e263d0bd2b811d</id>
<content type='text'>
The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3399.

It provides the following feature set:
 * up to 4GB DDR3
 * on-module SPI-NOR flash
 * on-module eMMC (with 8-bit interace)
 * SD card (on a baseboad) via edge connector
 * Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY
 * HDMI/eDP/MIPI displays
 * 2x MIPI-CSI
 * USB
   - 1x USB 3.0 dual-role (direct connection)
   - 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub)
 * on-module STM32 Cortex-M0 companion controller, implementing:
   - low-power RTC functionality (ISL1208 emulation)
   - fan controller (AMC6821 emulation)
   - USB&lt;-&gt;CAN bridge controller

Note that we use a multi-payload FIT image for booting and have
Cortex-M0 payload in a separate subimage: we thus rely on the FIT
image loader to put it into the SRAM region that ATF expects it in.

Signed-off-by: Klaus Goger &lt;klaus.goger@theobroma-systems.com&gt;
Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Fixed build warning on puma-rk3399:
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The RK3399-Q7 SoM is a Qseven-compatible (70mm x 70mm, MXM-230
connector) system-on-module from Theobroma Systems, featuring the
Rockchip RK3399.

It provides the following feature set:
 * up to 4GB DDR3
 * on-module SPI-NOR flash
 * on-module eMMC (with 8-bit interace)
 * SD card (on a baseboad) via edge connector
 * Gigabit Ethernet w/ on-module Micrel KSZ9031 GbE PHY
 * HDMI/eDP/MIPI displays
 * 2x MIPI-CSI
 * USB
   - 1x USB 3.0 dual-role (direct connection)
   - 2x USB 3.0 host + 1x USB 2.0 (on-module USB 3.0 hub)
 * on-module STM32 Cortex-M0 companion controller, implementing:
   - low-power RTC functionality (ISL1208 emulation)
   - fan controller (AMC6821 emulation)
   - USB&lt;-&gt;CAN bridge controller

Note that we use a multi-payload FIT image for booting and have
Cortex-M0 payload in a separate subimage: we thus rely on the FIT
image loader to put it into the SRAM region that ATF expects it in.

Signed-off-by: Klaus Goger &lt;klaus.goger@theobroma-systems.com&gt;
Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Fixed build warning on puma-rk3399:
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: dts: rk3399-puma: make the DTS dual-licensed</title>
<updated>2017-04-15T16:13:17+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-04-07T17:09:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=faf1afc4734c4b886c1359dc9b390aa2aceefb62'/>
<id>faf1afc4734c4b886c1359dc9b390aa2aceefb62</id>
<content type='text'>
The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
This updates the licensing info in the rk3399-puma.dts.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The RK3399-Q7 (Puma) DTS should (of course) be dual-licensed.
This updates the licensing info in the rk3399-puma.dts.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: rk3188: enable remap function</title>
<updated>2017-04-15T16:13:17+00:00</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2017-04-05T22:19:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=008a610b4cb1a3e55369c6c1f1060c892a81422c'/>
<id>008a610b4cb1a3e55369c6c1f1060c892a81422c</id>
<content type='text'>
Most Rockchip socs have the ability to either map the bootrom or a sram
area to the starting address of the cpu by flipping a bit in the GRF.

Newer socs leave this untouched and mapped to the bootrom but the legacy
loaders on rk3188 and before enabled the remap functionality and the
current smp implementation in the Linux kernel also requires it to be
enabled, to bring up secondary cpus.

So to keep smp working in the kernel, mimic the behaviour of the legacy
bootloaders and enable the remap functionality.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
Most Rockchip socs have the ability to either map the bootrom or a sram
area to the starting address of the cpu by flipping a bit in the GRF.

Newer socs leave this untouched and mapped to the bootrom but the legacy
loaders on rk3188 and before enabled the remap functionality and the
current smp implementation in the Linux kernel also requires it to be
enabled, to bring up secondary cpus.

So to keep smp working in the kernel, mimic the behaviour of the legacy
bootloaders and enable the remap functionality.

Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: cosmetic: Move rock board to its correct position</title>
<updated>2017-04-15T16:13:17+00:00</updated>
<author>
<name>Heiko Stübner</name>
<email>heiko@sntech.de</email>
</author>
<published>2017-04-05T22:19:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6499b1976cb90734a76fdf979f530741251e4978'/>
<id>6499b1976cb90734a76fdf979f530741251e4978</id>
<content type='text'>
Somehow 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") moved
the rock board in between some rk3288 board, probably as a result of
rebasing.

So move it back to its original position above all rk3288 boards.

Fixes: 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards")
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Somehow 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards") moved
the rock board in between some rk3288 board, probably as a result of
rebasing.

So move it back to its original position above all rk3288 boards.

Fixes: 43b5c78d8d91 ("rockchip: cosmetic: Sort RK3288 boards")
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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