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<title>u-boot.git/arch, branch v2018.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge git://git.denx.de/u-boot-imx</title>
<updated>2018-01-08T17:51:47+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-01-08T17:51:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2f4c9de3d00b09f74eaf9598ea4edbbc4f99b62d'/>
<id>2f4c9de3d00b09f74eaf9598ea4edbbc4f99b62d</id>
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<pre>
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</entry>
<entry>
<title>imx: initialize and use generic timer on i.MX 6UL/ULL</title>
<updated>2018-01-08T16:33:06+00:00</updated>
<author>
<name>Stefan Agner</name>
<email>stefan.agner@toradex.com</email>
</author>
<published>2018-01-05T14:08:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=46718353b2fc784fa8f658fd5112272ed921ce9a'/>
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<content type='text'>
The i.MX 6UL/ULL feature a Cortex-A7 CPU which suppor the ARM
generic timer. This change makes use of the ARM generic timer in
U-Boot.

This is crucial to make the ARM generic timers usable in Linux since
timer_init() initalizes the system counter module, which is necessary
to use the generic timers CP15 registers.

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
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<pre>
The i.MX 6UL/ULL feature a Cortex-A7 CPU which suppor the ARM
generic timer. This change makes use of the ARM generic timer in
U-Boot.

This is crucial to make the ARM generic timers usable in Linux since
timer_init() initalizes the system counter module, which is necessary
to use the generic timers CP15 registers.

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: introduce CONFIG_GPT_TIMER</title>
<updated>2018-01-08T16:33:06+00:00</updated>
<author>
<name>Stefan Agner</name>
<email>stefan.agner@toradex.com</email>
</author>
<published>2018-01-05T14:08:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=23b6a131fdae9fdd995e10cf43eec82536d434a7'/>
<id>23b6a131fdae9fdd995e10cf43eec82536d434a7</id>
<content type='text'>
Introduce a new config symbol to select the i.MX
General Purpose Timer (GPT).

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
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<pre>
Introduce a new config symbol to select the i.MX
General Purpose Timer (GPT).

Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: move CONFIG_SYSCOUNTER_TIMER to Kconfig</title>
<updated>2018-01-08T16:33:06+00:00</updated>
<author>
<name>Stefan Agner</name>
<email>stefan.agner@toradex.com</email>
</author>
<published>2018-01-05T14:08:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=616aa55d178788e134cc58439a7215b03c7090e4'/>
<id>616aa55d178788e134cc58439a7215b03c7090e4</id>
<content type='text'>
Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
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<pre>
Signed-off-by: Stefan Agner &lt;stefan.agner@toradex.com&gt;
Reviewed-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: tangier: Add Bluetooth to ACPI table</title>
<updated>2018-01-08T08:52:25+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2018-01-04T16:40:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5d8c4ebd95e23a606a40a73920b8d7d096a91d37'/>
<id>5d8c4ebd95e23a606a40a73920b8d7d096a91d37</id>
<content type='text'>
As defined on reference board followed by Intel Edison a Bluetooth
device is attached to HSU0, i.e. PCI 0000:04.1.

Describe it in ACPI accordingly.

Note, we use BCM2E95 ID here as one most suitable for such device based
on the description in commit message of commit 89ab37b489d1
	("Bluetooth: hci_bcm: Add support for BCM2E95 and BCM2E96")
in the Linux kernel source tree.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
As defined on reference board followed by Intel Edison a Bluetooth
device is attached to HSU0, i.e. PCI 0000:04.1.

Describe it in ACPI accordingly.

Note, we use BCM2E95 ID here as one most suitable for such device based
on the description in commit message of commit 89ab37b489d1
	("Bluetooth: hci_bcm: Add support for BCM2E95 and BCM2E96")
in the Linux kernel source tree.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: tangier: Use actual GPIO hardware numbers</title>
<updated>2018-01-08T08:52:25+00:00</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2018-01-04T16:40:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d08953e04596a83076b0f55e7c20b2c2c472e793'/>
<id>d08953e04596a83076b0f55e7c20b2c2c472e793</id>
<content type='text'>
The recent commit 03c4749dd6c7
  ("gpio / ACPI: Drop unnecessary ACPI GPIO to Linux GPIO translation")
in the Linux kernel reveals the issue we have in ACPI tables here,
i.e. we must use hardware numbers for GPIO resources and,
taking into consideration that GPIO and pin control are *different* IPs
on Intel Tangier, we need to supply numbers properly.

Besides that, it improves user experience since the official documentation
for Intel Edison board is referring to GPIO hardware numbering scheme.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The recent commit 03c4749dd6c7
  ("gpio / ACPI: Drop unnecessary ACPI GPIO to Linux GPIO translation")
in the Linux kernel reveals the issue we have in ACPI tables here,
i.e. we must use hardware numbers for GPIO resources and,
taking into consideration that GPIO and pin control are *different* IPs
on Intel Tangier, we need to supply numbers properly.

Besides that, it improves user experience since the official documentation
for Intel Edison board is referring to GPIO hardware numbering scheme.

Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Move commands from under arch/x86 to cmd/x86/</title>
<updated>2018-01-08T08:52:22+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-01-03T13:54:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8e18f34c28cad949710ffb781316bd2540b64de7'/>
<id>8e18f34c28cad949710ffb781316bd2540b64de7</id>
<content type='text'>
We only need to compile and link these files when building for full
U-Boot.  Move them to under cmd/x86/ to make sure they aren't linked in
and undiscarded due to u_boot_list_2_cmd_* being included).

Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
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<pre>
We only need to compile and link these files when building for full
U-Boot.  Move them to under cmd/x86/ to make sure they aren't linked in
and undiscarded due to u_boot_list_2_cmd_* being included).

Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mx6ull: Handle the CONFIG_MX6ULL cases correctly</title>
<updated>2018-01-04T15:29:04+00:00</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@nxp.com</email>
</author>
<published>2018-01-03T14:33:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=290e7cfdbfa288d26598c073186ab45e3fa711b3'/>
<id>290e7cfdbfa288d26598c073186ab45e3fa711b3</id>
<content type='text'>
Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
take this into consideration in all the checks for CONFIG_MX6UL.

This fixes a boot regression.

Reported-by: Stefan Agner &lt;stefan@agner.ch&gt;
Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Reviewed-by: Stefan Agner &lt;stefan@agner.ch&gt;
Tested-by: Breno Lima &lt;breno.lima@nxp.com&gt;
Tested-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Stefano Babic &lt;sbabic@denx.de&gt;
Tested-by: Jörg Krause &lt;joerg.krause@embedded.rocks&gt;
</content>
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<pre>
Since commit 051ba9e082f7 ("Kconfig: mx6ull: Deselect MX6UL from
CONFIG_MX6ULL") CONFIG_MX6ULL does not select CONFIG_MX6UL anymore, so
take this into consideration in all the checks for CONFIG_MX6UL.

This fixes a boot regression.

Reported-by: Stefan Agner &lt;stefan@agner.ch&gt;
Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Reviewed-by: Stefan Agner &lt;stefan@agner.ch&gt;
Tested-by: Breno Lima &lt;breno.lima@nxp.com&gt;
Tested-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Stefano Babic &lt;sbabic@denx.de&gt;
Tested-by: Jörg Krause &lt;joerg.krause@embedded.rocks&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>imx: spl: Fix NAND bootmode detection</title>
<updated>2018-01-03T13:01:38+00:00</updated>
<author>
<name>Eran Matityahu</name>
<email>eran.m@variscite.com</email>
</author>
<published>2017-12-14T18:20:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=af104ae5b87c8efb107ac282d09927d8346dc94f'/>
<id>af104ae5b87c8efb107ac282d09927d8346dc94f</id>
<content type='text'>
commit 20f14714169 ("imx: spl: Update NAND bootmode detection bit")
broke the NAND bootmode detection by checking if
BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_*
macros that were introduced since.

Tables 8-7 &amp; 8-10 from IMX6DQRM say the NAND boot mode selection
is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not
necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 &lt;= BOOT_CFG1[7:4] &lt;= 0xf,
like it was in the code before.

Signed-off-by: Eran Matityahu &lt;eran.m@variscite.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Jagan Teki &lt;jagan@openedev.com&gt;
Cc: Tim Harvey &lt;tharvey@gateworks.com&gt;
</content>
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<pre>
commit 20f14714169 ("imx: spl: Update NAND bootmode detection bit")
broke the NAND bootmode detection by checking if
BOOT_CFG1[7:4] == 0x8 for NAND boot mode.
This commit essentially reverts it, while using the IMX6_BMODE_*
macros that were introduced since.

Tables 8-7 &amp; 8-10 from IMX6DQRM say the NAND boot mode selection
is done when BOOT_CFG1[7] is 1, but BOOT_CFG1[6:4] is not
necessarily 0x0 in this case.
Actually, NAND boot mode is when 0x8 &lt;= BOOT_CFG1[7:4] &lt;= 0xf,
like it was in the code before.

Signed-off-by: Eran Matityahu &lt;eran.m@variscite.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Jagan Teki &lt;jagan@openedev.com&gt;
Cc: Tim Harvey &lt;tharvey@gateworks.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mx6: Add board mx6memcal for use in validating DDR</title>
<updated>2018-01-03T12:58:51+00:00</updated>
<author>
<name>Eric Nelson</name>
<email>eric@nelint.com</email>
</author>
<published>2017-12-11T15:52:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=baefb63a13d106458577704ca4586b3f414c9520'/>
<id>baefb63a13d106458577704ca4586b3f414c9520</id>
<content type='text'>
This is a virtual "board" that uses configuration files and
Kconfig to define the memory layout used by a real board during
the board bring-up process.

It generates an SPL image that can be loaded using imx_usb or
SB_LOADER.exe.

When run, it will generate a set of calibration constants for
use in either or both a DCD configuration file for boards that
use u-boot.imx or struct mx6_mmdc_calibration for boards that
boot via SPL.

In essence, it is a configurable, open-source variant of the
Freescale ddr-stress tool.

	https://community.nxp.com/docs/DOC-105652

File mx6memcal_defconfig configures the board for use with
mx6sabresd or mx6qsabreauto.

Signed-off-by: Eric Nelson &lt;eric@nelint.com&gt;
Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a virtual "board" that uses configuration files and
Kconfig to define the memory layout used by a real board during
the board bring-up process.

It generates an SPL image that can be loaded using imx_usb or
SB_LOADER.exe.

When run, it will generate a set of calibration constants for
use in either or both a DCD configuration file for boards that
use u-boot.imx or struct mx6_mmdc_calibration for boards that
boot via SPL.

In essence, it is a configurable, open-source variant of the
Freescale ddr-stress tool.

	https://community.nxp.com/docs/DOC-105652

File mx6memcal_defconfig configures the board for use with
mx6sabresd or mx6qsabreauto.

Signed-off-by: Eric Nelson &lt;eric@nelint.com&gt;
Signed-off-by: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
</pre>
</div>
</content>
</entry>
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