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<title>u-boot.git/arch, branch v2020.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch?h=v2020.01</id>
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<updated>2020-01-03T14:47:11Z</updated>
<entry>
<title>arm: mach-k3: Enable WA for R5F deadlock</title>
<updated>2020-01-03T14:47:11Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2019-12-31T10:19:55Z</published>
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<id>urn:sha1:40109f4d7ed114cd473e5528b7b0a9a04be9207e</id>
<content type='text'>
On K3 devices there are 2 conditions where R5F can deadlock:
1.When software is performing series of store operations to
  cacheable write back/write allocate memory region and later
  on software execute barrier operation (DSB or DMB). R5F may
  hang at the barrier instruction.
2.When software is performing a mix of load and store operations
  within a tight loop and store operations are all writing to
  cacheable write back/write allocates memory regions, R5F may
  hang at one of the load instruction.

To avoid the above two conditions disable linefill optimization
inside Cortex R5F which will make R5F to only issue up to 2 cache
line fills at any point of time.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
</content>
</entry>
<entry>
<title>arm: dts: k3-j721e: ddr: Update to 0.2 version of DDR config tool</title>
<updated>2020-01-03T14:47:10Z</updated>
<author>
<name>Lokesh Vutla</name>
<email>lokeshvutla@ti.com</email>
</author>
<published>2019-12-31T10:18:48Z</published>
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<id>urn:sha1:196d3e4017735c82cb5aa4387a9c44174a8391ac</id>
<content type='text'>
Update the ddr settings to use the DDR reg config tool rev 0.2.0.
This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order
to avoid DSS underflow errors.

Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Signed-off-by: Kevin Scholz &lt;k-scholz@ti.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-rockchip-20191231' of https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2020-01-02T15:28:26Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-01-02T15:28:26Z</published>
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<id>urn:sha1:28aa6dc29a0f35c5c5d969c83428a50361932f5b</id>
<content type='text'>
- Fix latest mainline kernel for rk3308
- Update rk3288-evb config to suport OP-TEE
- Fix for firefly-px30 DEBUG_UART channel and make it standalone
- Script make_fit_atf add python3 support
- Fix rk3328 timer with correct COUNTER_FREQUENCY
- Fix rk3328 ATF support with enable spl-fifo-mode
</content>
</entry>
<entry>
<title>arch/arm/Kconfig: typo/grammar/punctuation fixes</title>
<updated>2020-01-02T15:27:23Z</updated>
<author>
<name>Robert P. J. Day</name>
<email>rpjday@crashcourse.ca</email>
</author>
<published>2019-12-25T11:34:07Z</published>
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<id>urn:sha1:e852b30b239d5f8527eb992f805528620ae0965f</id>
<content type='text'>
Various (mostly minor) spelling, grammar and punctuation tweaks for
arch/arm/Kconfig.

Signed-off-by: Robert P. J. Day &lt;rpjday@crashcourse.ca&gt;
</content>
</entry>
<entry>
<title>rockchip: rk3328: enable spl-fifo-mode for emmc and sdmmc</title>
<updated>2019-12-31T07:57:55Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2019-12-31T07:57:55Z</published>
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<id>urn:sha1:fa2047c47310be051a7d3e7d4f08e7724b7995a9</id>
<content type='text'>
Since mmc to sram can't do dma, add patch to prevent aborts transfering
TF-A parts.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-imx-20191228' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx</title>
<updated>2019-12-28T13:07:16Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-12-28T13:07:16Z</published>
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<id>urn:sha1:6cb87cbb1475f668689f95911d1521ee6ba7f55c</id>
<content type='text'>
Fixes for 2020.01
-----------------
- Fixes for Nitrogen6x
- Fix corruption for mx51evk
- colibri i.MX6: fix broken ESDHC conversion
- mx6sxsabresd: fix broken mmcdev
- imx6q_logic: cleanup boot sequence
- update ATF for imx8mq_evk
- pfuze: fix pmic_get()

Travis CI: https://travis-ci.org/sbabic/u-boot-imx/builds/630007464
</content>
</entry>
<entry>
<title>ARM: i.MX6: TARGET_NITROGEN6X: add 'select MX6QDL'</title>
<updated>2019-12-27T13:28:42Z</updated>
<author>
<name>Troy Kisky</name>
<email>troy.kisky@boundarydevices.com</email>
</author>
<published>2019-11-04T02:20:05Z</published>
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<id>urn:sha1:61d7e2bcc717da7d9b4774411f0903a3747797b0</id>
<content type='text'>
This fixes commit &lt;91435cd40d30&gt; "ARM: i.MX6: exclude the ARM errata
 from i.MX6 UP system"

for nitrogen6x. The above commit removed the errata for the board
since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS

This restores the errata configs.

Signed-off-by: Troy Kisky &lt;troy.kisky@boundarydevices.com&gt;
Reviewed-by: Fabio Estevam &lt;festevam@gmail.com&gt;
</content>
</entry>
<entry>
<title>tools/imximage: share DCD information via Kconfig</title>
<updated>2019-12-27T11:55:59Z</updated>
<author>
<name>Jorge Ramirez-Ortiz</name>
<email>jorge@foundries.io</email>
</author>
<published>2019-12-11T09:42:36Z</published>
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<id>urn:sha1:e97bdfa5da70600e9755d6f70713744ed25f62c3</id>
<content type='text'>
IMX based platforms can have the DCD table located on different
addresses due to differences in their memory maps (ie iMX7ULP).

This information is required by the user to sign the images for secure
boot so continue making it accessible via mkimage.

Signed-off-by: Jorge Ramirez-Ortiz &lt;jorge@foundries.io&gt;
Reviewed-by: Fabio Estevam &lt;festevam@gmail.com&gt;
Signed-off-by: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>rockchip: add description for TPL_ROCKCHIP_COMMON_BOARD</title>
<updated>2019-12-27T06:26:13Z</updated>
<author>
<name>Thomas Hebb</name>
<email>tommyhebb@gmail.com</email>
</author>
<published>2019-12-21T02:05:22Z</published>
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<id>urn:sha1:d4e4187b8cb71688587d0a8528522b0033bc5a24</id>
<content type='text'>
SPL_ROCKCHIP_COMMON_BOARD, an almost identical option, has a title but
this one doesn't for some reason. Add a description to make the menu
easier to read.

Signed-off-by: Thomas Hebb &lt;tommyhebb@gmail.com&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>rockchip: px30-firefly add standalone dts</title>
<updated>2019-12-27T06:26:13Z</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2019-12-13T09:41:17Z</published>
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<id>urn:sha1:3176d47d35dd5a3fcddc46f89d72ae2fa56ec36e</id>
<content type='text'>
Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot
proper will use the dts setting to do the IOMUX init, and a separate dts
is needed for px30-firefly.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
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