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<title>u-boot.git/arch, branch v2020.07-rc5</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/arch?h=v2020.07-rc5</id>
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<updated>2020-06-19T16:41:24Z</updated>
<entry>
<title>Merge tag 'u-boot-stm32-20200619' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm</title>
<updated>2020-06-19T16:41:24Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-06-19T16:41:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1e389a434aa9821330523002ee7b50d1147e0fef'/>
<id>urn:sha1:1e389a434aa9821330523002ee7b50d1147e0fef</id>
<content type='text'>
- fix SD card cart detect on DHCOM and ST boards
</content>
</entry>
<entry>
<title>ARM: dts: stm32: Reinstate card detect behavior on ST boards</title>
<updated>2020-06-19T12:18:36Z</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-06-19T09:19:45Z</published>
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<id>urn:sha1:792919241b3d750cd5295dfe6dd1d0958b9be468</id>
<content type='text'>
The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
unsupported, reinstate the old cd-gpios behavior until this handling
is fully implemented. This avoid potential issue for SDCard boot:
the card detect fails with floating gpio.

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: stm32: Reinstate card detect behavior on DHSOM</title>
<updated>2020-06-19T07:43:59Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2020-06-18T18:35:17Z</published>
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<id>urn:sha1:3c2e2a1a79608c5e046313a8c47586d9a734e2a3</id>
<content type='text'>
The cd-gpios with (GPIO_ACTIVE_LOW | GPIO_PULL_UP) gpio is thus far
unsupported, reinstate the old cd-gpios behavior until this handling
is fully implemented. This permits the DHSOM to boot from SD again,
without this patch the card detect fails.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Cc: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
</content>
</entry>
<entry>
<title>ARM: tegra: Enable PSCI support for Tegra210 and Tegra186</title>
<updated>2020-06-18T20:14:50Z</updated>
<author>
<name>Jon Hunter</name>
<email>jonathanh@nvidia.com</email>
</author>
<published>2020-06-18T11:54:39Z</published>
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<id>urn:sha1:1ec74533840650b914ccdf9f62a298ecb29994ab</id>
<content type='text'>
The PSCI nodes are currently not populated for the Tegra210 and Tegra186
devices. This prevents the PSCI driver from being able to identify the
PSCI method used by these devices and causes the probe of the PSCI
driver to fail.

Since commit 81ea00838c68 ("efi_loader: PSCI reset and shutdown") was
added, which moves the PSCI EFI system reset handler into the PSCI
driver, this has prevented the EFI system reset from working for
Tegra210 and Tegra186. Therefore, populating these nodes is necessary
to fix the EFI system reset for Tegra210 and Tegra186.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Tested-by: Peter Robinson &lt;pbrobinson@gmail.com&gt;
</content>
</entry>
<entry>
<title>dts: ARM: stm32mp15: add OP-TEE node in u-boot DTSI</title>
<updated>2020-06-16T08:39:28Z</updated>
<author>
<name>Etienne Carriere</name>
<email>etienne.carriere@linaro.org</email>
</author>
<published>2020-06-05T07:24:30Z</published>
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<id>urn:sha1:9e696965065c43b59901e49e75435b1549fa55c7</id>
<content type='text'>
Add OP-TEE firmware node in stm32mp15 U-Boot DTSI. This node is
needed since commit [1] that changed U-Boot/stm32mp15 to detect
OP-TEE availability by probing the resource instead of relying on
U-Boot configuration. The software sequence implemented by [1] is
fine but U-Boot DTS/DTSI files were not updated accordingly since,
hence OP-TEE presence is never detected by U-Boot, preventing Linux
kernel from using OP-TEE resources.

For consistency and to synchronize stm32mp15 DTSI files (excluding
U-Boot specific DTSI files) with the Linux kernel ones, this change
also moves the OP-TEE reserved memory nodes from board generic DTSI
files to U-Boot specific board DTSI files.

Link: [1] commit 43df0a159df6 ("stm32mp1: dynamically detect op-tee presence")
Signed-off-by: Etienne Carriere &lt;etienne.carriere@linaro.org&gt;
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>board: stm32mp1: fix handling of DT OP-TEE reserved memory nodes</title>
<updated>2020-06-16T08:38:09Z</updated>
<author>
<name>Etienne Carriere</name>
<email>etienne.carriere@linaro.org</email>
</author>
<published>2020-06-05T07:24:29Z</published>
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<id>urn:sha1:164873a0c02ddbc9a59ad3a0670f17684fc00737</id>
<content type='text'>
Fix the sequence in stm32mp1 fdt.c that disables OP-TEE resources
defined in FDT when U-boot detects OP-TEE firmware is not present.

Before this change, helper function stm32_fdt_disable_optee()
set property status to "disabled" for the OP-TEE reserved memory
nodes but this has no impact since Linux kernel does not consider
the status property for reserved-memory subnodes. This change
make U-Boot to attempt to delete the node instead.

Fixes: 4a1b975dac02 ("board: stm32mp1: reserve memory for OP-TEE in device tree")
Signed-off-by: Etienne Carriere &lt;etienne.carriere@linaro.org&gt;
Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'mmc-2020-6-15' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc</title>
<updated>2020-06-15T14:20:35Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-06-15T14:20:35Z</published>
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<id>urn:sha1:bb1ff1371e23c699700a53a53b7c30c310b285fa</id>
<content type='text'>
- fsl_esdhc sdr104 and hs200 fix and error path fix
- fsl_esdhc workaround 3.3v io issue
- ca_dw_mmc cleanup
- presidio-asic emmc DT update.
</content>
</entry>
<entry>
<title>board: presidio-asic: update eMMC DT information</title>
<updated>2020-06-15T01:45:22Z</updated>
<author>
<name>Alex Nemirovsky</name>
<email>alex.nemirovsky@cortina-access.com</email>
</author>
<published>2020-05-22T00:24:23Z</published>
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<id>urn:sha1:1ac64476440ee293e51f03d5b612b2b44b059976</id>
<content type='text'>
Change DT compatibility name to match change in driver's name.
Remove unused io_ds and fifo_mode fields from DT.

Signed-off-by: Alex Nemirovsky &lt;alex.nemirovsky@cortina-access.com&gt;
CC: Peng Fan &lt;peng.fan@nxp.com&gt;
CC: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
CC: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Merge https://gitlab.denx.de/u-boot/custodians/u-boot-socfpga</title>
<updated>2020-06-14T16:00:50Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-06-14T16:00:50Z</published>
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<id>urn:sha1:18d8977bdff65cf895ff2a3df7d93de88913e4d1</id>
<content type='text'>
- cyclone5 bugfix
</content>
</entry>
<entry>
<title>arm: dts: socfpga: cyclone5: Update i2c-scl-falling-time-ns</title>
<updated>2020-06-14T11:37:31Z</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2020-06-10T05:24:16Z</published>
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<id>urn:sha1:a0bda1dd8382be57389833024ba40518ec098ac3</id>
<content type='text'>
Commit e71b6f6622d6 ("i2c: designware_i2c: Rewrite timing calculation")
change the hcnt and lcnt timing calculation. New timing calculation is
based on calculation from Designware i2c databook.

After this new timing calculation, hcnt will have negative value
with i2c-scl-falling-time-ns 5000 that set in socfpga_cyclone5_socdk.dts.

This patch overwrite i2c-scl-falling-time-ns to 300ns (default SCL fall
time used in Designware i2c driver) for Uboot.

Before the fix:
=&gt; i2c dev 0
Setting bus to 0
Failure changing bus number (-22)

After the fix:
=&gt; i2c dev 0
Setting bus to 0
=&gt; i2c probe
Valid chip addresses: 17 51 55 5B 5C 5E 66 68 70

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
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