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<title>u-boot.git/arch, branch v2023.07.01</title>
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<updated>2023-07-10T01:54:40Z</updated>
<entry>
<title>Merge tag 'fsl-qoriq-2023-7-6' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next</title>
<updated>2023-07-10T01:54:40Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-07-10T01:54:40Z</published>
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<id>urn:sha1:76c61f29d63163d178b1584ecc9fc2c96c538ff0</id>
<content type='text'>
Enable DM Serial for ls1043ardb and ls1046ardb/afrwy
Fixed secure boot on LS-CH2 platforms
</content>
</entry>
<entry>
<title>Kbuild: Fix cleanup of *.dtbo for sandbox</title>
<updated>2023-07-07T20:25:56Z</updated>
<author>
<name>Tobias Deiminger</name>
<email>tdmg@linutronix.de</email>
</author>
<published>2023-06-19T22:41:06Z</published>
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<id>urn:sha1:57fdec65c5d9d6e16ed273243178eb3dc95c8a88</id>
<content type='text'>
sandbox can generate DT overlays, but they were not cleaned.

Extend the explicit clean-files list accordingly.

Fixes: 95300f203f32 ("pytest: add sandbox test for "extension" command")
Signed-off-by: Tobias Deiminger &lt;tdmg@linutronix.de&gt;
</content>
</entry>
<entry>
<title>riscv: andes_plicsw: Fix IPI during OpenSBI invocation</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Yu Chien Peter Lin</name>
<email>peterlin@andestech.com</email>
</author>
<published>2023-07-04T11:13:20Z</published>
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<id>urn:sha1:bc35b49a5c12891d969e28dbf29024ca664dea8b</id>
<content type='text'>
On some AE350 boards, we need to explicitly initialize the priority
registers to a non-zero value so the boot hart can instruct secondary
harts to jump to OpenSBI.

This patch also updates the information about PLICSW.

Signed-off-by: Yu Chien Peter Lin &lt;peterlin@andestech.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: sync mpfs-icicle devicetree with linux</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-06-15T10:12:43Z</published>
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<id>urn:sha1:4e99899bd546b7cd60735df4b18da6eabdc38cb1</id>
<content type='text'>
The "notable" disappearances are:
- the pac193x stanza - there's nothing in mainline linux w.r.t. bindings
  for this &amp; what is going to appear in mainline linux is going to be
  incompatible with what is currently in U-Boot.
- operating points - these operating points should not be set at the
  soc.dtsi level as they may not be possible depending on the design
  programmed to the FPGA
- clock output names - there are defines for the clock indices, these
  should not be needed
- the dt maintainers in linux NAKed using defines for IRQ numbers
- the qspi nand, which is not part of the icicle's default configuration
  is removed.

Reviewed-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Tested-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
</content>
</entry>
<entry>
<title>riscv: dts: drop microchip from dts filenames</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-06-15T10:12:42Z</published>
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<id>urn:sha1:5566cf2a6d9ec677684e6200acb4ad39287e9678</id>
<content type='text'>
The original names picked for the DT doesn't match Linux's naming scheme
and it was renamed there a while ago. Rename it in U-Boot to allow
easily syncing dts between the two projects.

Reviewed-by: Rick Chen &lt;rick@andestech.com&gt;
Reviewed-by: Padmarao Begari &lt;padmarao.begari@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>riscv: define test_and_{set,clear}_bit in asm/bitops.h</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Ben Dooks</name>
<email>ben.dooks@sifive.com</email>
</author>
<published>2023-05-05T08:02:07Z</published>
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<id>urn:sha1:661e2215f8483cc7a77badeab6dcbf6a88cc715c</id>
<content type='text'>
These seem to be missing, and trying to build ubifs without them
is causing errors due to these being missing.

Signed-off-by: Ben Dooks &lt;ben.dooks@sifive.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>riscv: implement local_irq_{save,restore} macros</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Ben Dooks</name>
<email>ben.dooks@sifive.com</email>
</author>
<published>2023-05-05T08:02:06Z</published>
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<id>urn:sha1:551de2169a49962f9d6c02ee3faa4ccc41f32107</id>
<content type='text'>
Add implementations of the local_irq_{save,restore} macros so that
&lt;asm/atomic.h&gt; can be used with riscv.

Signed-off-by: Ben Dooks &lt;ben.dooks@sifive.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>riscv: add generic link for &lt;asm/atomic.h&gt;</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Ben Dooks</name>
<email>ben.dooks@sifive.com</email>
</author>
<published>2023-05-05T08:02:05Z</published>
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<id>urn:sha1:3c874711ba2d66361b6040df48814be666aa6b1d</id>
<content type='text'>
Add a link from &lt;asm/atomic.h&gt; to the generic one to allow
things like ubifs to be built. This can be extended with
riscv AMO ops at a later date.

Signed-off-by: Ben Dooks &lt;ben.dooks@sifive.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>cmd/sbi: display new extensions</title>
<updated>2023-07-06T09:28:08Z</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>heinrich.schuchardt@canonical.com</email>
</author>
<published>2023-04-12T08:38:16Z</published>
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<id>urn:sha1:7906155ed35ea584c3f8461d297426277d2d4416</id>
<content type='text'>
OpenSBI already implements some extensions that are not ratified yet:

* Debug Console Extension (DBCN)
* System Suspend Extension (SUSP)
* Collaborative Processor Performance Control Extension (CPPC)

Allow the sbi command to display these.

Provide the FID definitions of the Debug Console Extension. We can use that
extension for an early debug console driver.

Signed-off-by: Heinrich Schuchardt &lt;heinrich.schuchardt@canonical.com&gt;
Reviewed-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>LFU-544: Kconfig.nxp: Fixed secure boot on LS-CH2 platforms</title>
<updated>2023-07-06T05:04:56Z</updated>
<author>
<name>Kshitiz Varshney</name>
<email>kshitiz.varshney@nxp.com</email>
</author>
<published>2023-06-22T09:24:45Z</published>
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<id>urn:sha1:fcf75435c8fd443547f5d4192d1cf70fb8a84034</id>
<content type='text'>
pimg64 image pointer is dependent on ESBC_ADDR_64BIT config, which is
getting disabled, due to dependency on ESBC_HDR_LS.
ESBC_HDR_LS is required for LS-CH3 platforms.
So, removing the dependency on ESBC_HDR_LS.

Signed-off-by: Kshitiz Varshney &lt;kshitiz.varshney@nxp.com&gt;
Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
</content>
</entry>
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