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<title>u-boot.git/board/altera, branch v2016.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/altera?h=v2016.01-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/board/altera?h=v2016.01-rc2'/>
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<updated>2015-11-12T00:26:59Z</updated>
<entry>
<title>nios2: add 3c120 and 10m50 devboards MAINTAINERS</title>
<updated>2015-11-12T00:26:59Z</updated>
<author>
<name>Thomas Chou</name>
<email>thomas@wytron.com.tw</email>
</author>
<published>2015-11-10T12:36:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=038be18fd95aa6283eafb85ceabc0b880976424b'/>
<id>urn:sha1:038be18fd95aa6283eafb85ceabc0b880976424b</id>
<content type='text'>
Add 3c120 and 10m50 devboards MAINTAINERS

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>nios2: zap nios2-generic board dir</title>
<updated>2015-10-23T06:55:36Z</updated>
<author>
<name>Thomas Chou</name>
<email>thomas@wytron.com.tw</email>
</author>
<published>2015-10-23T06:55:36Z</published>
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<id>urn:sha1:6168dc6a7a28da3e865314bf1ba5a53eaebe63ac</id>
<content type='text'>
As we use device tree to control u-boot now, the generic
board can be removed.

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
</content>
</entry>
<entry>
<title>nios2: zap initdram</title>
<updated>2015-10-22T23:37:20Z</updated>
<author>
<name>Thomas Chou</name>
<email>thomas@wytron.com.tw</email>
</author>
<published>2015-10-09T03:36:01Z</published>
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<id>urn:sha1:bbba0714b7ca2d2424c11193a7884da8ef05c520</id>
<content type='text'>
Zap initdram(), as it is not used.

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>nios2: convert altera sysid to driver model</title>
<updated>2015-10-22T23:37:03Z</updated>
<author>
<name>Thomas Chou</name>
<email>thomas@wytron.com.tw</email>
</author>
<published>2015-10-14T00:43:31Z</published>
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<id>urn:sha1:ca844dd8c55f3b7bbba8144b0dcbf1297fcaece0</id>
<content type='text'>
Convert altera sysid to driver model with misc uclass.

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Acked-by: Chin Liang See &lt;clsee@altera.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>nios2 : convert altera_pio to driver model</title>
<updated>2015-10-22T23:37:03Z</updated>
<author>
<name>Thomas Chou</name>
<email>thomas@wytron.com.tw</email>
</author>
<published>2015-10-21T13:33:45Z</published>
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<id>urn:sha1:88d5ecf4b9c0d5a3bff5d6d98ab7383a550a57db</id>
<content type='text'>
Convert altera_pio to driver model.

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Acked-by: Chin Liang See &lt;clsee@altera.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>nios2: move altera_pio_init to board_early_init_r</title>
<updated>2015-10-22T23:28:37Z</updated>
<author>
<name>Thomas Chou</name>
<email>thomas@wytron.com.tw</email>
</author>
<published>2015-09-04T08:19:16Z</published>
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<id>urn:sha1:b6c180928c3c7c9efbdc5eb1b468c450c877abdf</id>
<content type='text'>
As altera_pio_init() uses BSS, it should be moved to
board_early_init_r().

Signed-off-by: Thomas Chou &lt;thomas@wytron.com.tw&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: update MAINTAINERS' file for cyclone5_socdk and arria5_socdk</title>
<updated>2015-09-23T01:55:28Z</updated>
<author>
<name>Dinh Nguyen</name>
<email>dinguyen@opensource.altera.com</email>
</author>
<published>2015-09-22T22:01:33Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4348f36bbbc91633022a39739c584a83af1762d8'/>
<id>urn:sha1:4348f36bbbc91633022a39739c584a83af1762d8</id>
<content type='text'>
commit "arm: socfpga: rename socfpga_cyclone5 and socfpga_arria5 config files"
renames the configs files, so we should update the MAINTAINERS' entry. At
the same time, update the email for Dinh Nguyen.

Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Fix ArriaV SoCDK PLL config</title>
<updated>2015-08-23T09:56:21Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2015-08-19T05:46:49Z</published>
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<id>urn:sha1:29aa439759ed2e5dfa45cd8d6d5a1d51604e3820</id>
<content type='text'>
Pull out the ArriaV SoCDK clock config from ancient Altera U-Boot
"rel_socfpga_v2013.01.01_15.05.01_pr" and implant those values into
mainline to get a booting ArriaV SoCDK.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Fix MAINTAINERS entry for CV/AV SoCDK</title>
<updated>2015-08-23T09:56:20Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2015-08-19T20:25:44Z</published>
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<id>urn:sha1:d418301167a1b8ccc64060a5a538c2980cdae073</id>
<content type='text'>
Repair the maintainer entries so they match the current state of code.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Make the pinmux table const u8</title>
<updated>2015-08-23T09:56:20Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2015-08-10T20:17:46Z</published>
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<id>urn:sha1:cc9429a5562489cf8a4eb0d722c36e1bdfde4907</id>
<content type='text'>
Now that we're actually converting the QTS-generated header files,
we can even adjust their data types. A good candidate for this is
the pinmux table, where each entry can have value in the range of
0..3, but each element is declared as unsigned long. By changing
the type to u8, we can save over 600 Bytes from the SPL, so do it.
This patch also constifies the array.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
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