u-boot.git/board/amcc, branch v2009.01 Unnamed repository; edit this file 'description' to name the repository. ppc4xx: Changed 460EX/GT OCM TLB and internal SRAM initialization 2008-11-21T10:02:04+00:00 Dave Mitchell dmitch71@gmail.com 2008-11-20T20:09:50+00:00 ddf45cc758d394591fb9bcdcbe96530f733f2bce Expanded OCM TLB to allow access to 64K OCM as well as 256K of internal SRAM. Adjusted internal SRAM initialization to match updated user manual recommendation. OCM & ISRAM are now mapped as follows: physical virtual size ISRAM 0x4_0000_0000 0xE300_0000 256k OCM 0x4_0004_0000 0xE304_0000 64k A single TLB was used for this mapping. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> 
Expanded OCM TLB to allow access to 64K OCM as well as 256K of
internal SRAM.

Adjusted internal SRAM initialization to match updated user
manual recommendation.

OCM & ISRAM are now mapped as follows:
        physical        virtual         size
ISRAM   0x4_0000_0000   0xE300_0000     256k
OCM     0x4_0004_0000   0xE304_0000     64k

A single TLB was used for this mapping.

Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
ppc4xx: Added ppc4xx-isram.h for internal SRAM and L2 cache DCRs 2008-11-21T09:52:33+00:00 Dave Mitchell dmitch71@gmail.com 2008-11-20T20:00:49+00:00 b14ca4b61a681f75f3125676e09d7ce6af66e927 Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and L2 cache DCRs from ppc440.h to this new header. Also converted these DCR defines from lowercase to uppercase and modified referencing modules to use them. Signed-off-by: Dave Mitchell <dmitch71@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de> 
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.

Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.

Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Align end of bss by 4 bytes 2008-11-18T22:13:16+00:00 Selvamuthukumar selva.muthukumar@e-coninfotech.com 2008-10-16T17:24:03+00:00 9b827cf1720acda2473afa516956eab6f7cca9a1 Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de> 
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.

Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Coding Style cleanup, update CHANGELOG 2008-11-02T15:14:22+00:00 Wolfgang Denk wd@denx.de 2008-11-02T15:14:22+00:00 3cbd823116ea8b7c654e275a8c2fca87cd1f5dc5 Signed-off-by: Wolfgang Denk <wd@denx.de> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2008-10-21T19:19:35+00:00 Wolfgang Denk wd@denx.de 2008-10-21T19:19:35+00:00 06c29422189388f3082c5bab226af17e90d51ee7 






ppc4xx: Add 1.0 & 1.066 GHz to canyonlands bootstrap command for PLL setup
2008-10-21T15:35:02+00:00

Stefan Roese
sr@denx.de

2008-10-13T13:15:31+00:00

f4d14c55504ce40287321bd63ee269e3233ee4ae

Signed-off-by: Stefan Roese <sr@denx.de>





Signed-off-by: Stefan Roese <sr@denx.de>







ppc4xx: Add AMCC Arches board support (dual 460GT)
2008-10-21T15:34:46+00:00

Adam Graham
agraham@amcc.com

2008-10-08T17:12:53+00:00

f09f09d3899017aaaa2b031bba63c271e9c48e4d

The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.

Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>





The Arches Evaluation board is based on the AMCC 460GT SoC chip.
This board is a dual processor board with each processor providing
independent resources for Rapid IO, Gigabit Ethernet, and serial
communications. Each 460GT has it's own 512MB DDR2 memory, 32MB NOR
FLASH, UART, EEPROM and temperature sensor, along with a shared debug
port. The two 460GT's will communicate with each other via shared
memory, Gigabit Ethernet and x1 PCI-Express.

Signed-off-by: Adam Graham <agraham@amcc.com>
Signed-off-by: Victor Gallardo <vgallardo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>







Cleanup: fix "MHz" spelling
2008-10-21T09:25:39+00:00

Wolfgang Denk
wd@denx.de

2008-10-19T00:35:50+00:00

8ed44d91c8122d00368523b0b746691c895d3b3c

Signed-off-by: Wolfgang Denk <wd@denx.de>





Signed-off-by: Wolfgang Denk <wd@denx.de>







rename CFG_ macros to CONFIG_SYS
2008-10-18T19:54:03+00:00

Jean-Christophe PLAGNIOL-VILLARD
plagnioj@jcrosoft.com

2008-10-16T13:01:15+00:00

6d0f6bcf337c5261c08fabe12982178c2c489d76

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>





Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>







ppc4xx: Canyonlands: Remove unnecessary FDT warning upon DTB fixup
2008-09-22T21:17:31+00:00

Stefan Roese
sr@denx.de

2008-09-22T14:10:43+00:00

8fd4166c467a46773f80208bda1ec3b4757747bc

Depending on the configuration jumper "SATA SELECT", U-Boot disabled
either one PCIe node or the SATA node in the device tree blob. This
patch removes the unnecessary and even confusing warning, when the node
is not found at all.

Signed-off-by: Stefan Roese <sr@denx.de>





Depending on the configuration jumper "SATA SELECT", U-Boot disabled
either one PCIe node or the SATA node in the device tree blob. This
patch removes the unnecessary and even confusing warning, when the node
is not found at all.

Signed-off-by: Stefan Roese <sr@denx.de>