The current define of get_bus_freq() in the CONFIG_NAND_SPL #ifdef is not
used at all. This patch changes it's define to the currently used value of
133333333 and removes the unnecessary code.

Signed-off-by: Stefan Roese <sr@denx.de>

Currently the NOR & NAND support in Linux only works for the "standard"
Sequoia, the version booting for NOR flash. The NAND-booting version
has the chip-selects swapped. Here the chip-select mappings:

"Standard" NOR-booting version:
CS0	NOR
CS3	NAND

NAND-booting version:
CS0	NAND
CS3	NOR

With this path the dtb gets fixed-up, so that the correct chip-select
numbers are patched in the dtb enabling correct NOR & NAND support
in Linux on the NAND-booting Sequoia version.

Signed-off-by: Stefan Roese <sr@denx.de>

This patch fixes a bug in the Sequoia TLB init code to reconfigure
the correct TLB (boot space) after running from RAM. This bug was
introduced with patch 4d332dbeb08f5863d1ea69d91a00c5499d3a87ed
[ppc4xx: Make Sequoia boot vxWorks] which changed the order of the
TLB in the Sequoia init.S file.

Signed-off-by: Stefan Roese <sr@denx.de>

A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script.  Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.

However, '*(.rodata*)' by itself will result in sub-optimal section
ordering.  The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file.  This is easy to fix by using the
SORT_BY_ALIGNMENT command.

This patch has not be tested one most of the boards modified.  Some boards
have a linker script that looks something like this:

*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)

I change this to:

*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))

This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.

Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>

Sequoia board schematics (DES0211_11_SCH_11.pdf, page 5, unit U1D)
specifies that BankSel#1 is not connected, while bootloader memory
configuration is (board/amcc/sequoia/sdram.c):
       mtsdram(DDR0_10, 0x00000300);
i.e. both Chip Selects used - not correct.

If we change to correct value here:
       mtsdram(DDR0_10, 0x00000100);
memory is accessible OK also.

Signed-off-by: Mikhail Zolotaryov <lebon@lebon.org.ua>
Signed-off-by: Stefan Roese <sr@denx.de>

Some AMCC eval boards do have a board_eth_init() function calling
pci_eth_init(). These boards need to call cpu_eth_init() explicitly now
with the new eth_init rework.

Signed-off-by: Stefan Roese <sr@denx.de>

Remove command name from all command "usage" fields and update
common/command.c to display "name - usage" instead of
just "usage". Also remove newlines from command usage fields.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

Update taihu and taishan commands to use cmd_usage() function
to display usage messages.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

Expanded OCM TLB to allow access to 64K OCM as well as 256K of
internal SRAM.

Adjusted internal SRAM initialization to match updated user
manual recommendation.

OCM & ISRAM are now mapped as follows:
        physical        virtual         size
ISRAM   0x4_0000_0000   0xE300_0000     256k
OCM     0x4_0004_0000   0xE304_0000     64k

A single TLB was used for this mapping.

Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>