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<title>u-boot.git/board/armltd, branch v2016.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/armltd?h=v2016.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/board/armltd?h=v2016.07'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2016-03-15T19:13:04Z</updated>
<entry>
<title>vexpress64: Add MMU tables</title>
<updated>2016-03-15T19:13:04Z</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-03-04T00:09:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e593bf5eb36669a5f8a55271eb8c14cb4cf93961'/>
<id>urn:sha1:e593bf5eb36669a5f8a55271eb8c14cb4cf93961</id>
<content type='text'>
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>vexpress64: use 2nd DRAM bank only on juno</title>
<updated>2015-11-22T02:50:28Z</updated>
<author>
<name>Ryan Harkin</name>
<email>ryan.harkin@linaro.org</email>
</author>
<published>2015-11-18T10:39:07Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2c2b218383f05be51e1bd5f5982a44b969c4b5a6'/>
<id>urn:sha1:2c2b218383f05be51e1bd5f5982a44b969c4b5a6</id>
<content type='text'>
This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.

The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:

    commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059
    Author: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
    Date:   Mon Oct 19 11:08:31 2015 +0100

    vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.

    Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
    Declare a secondary memory bank and set the sizes correctly.

    Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
    Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
    Reviewed-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
    Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;

Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model.  Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Acked-by: Liviu Dudau &lt;liviu.dudau@foss.arm.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>vexpress64: compile Juno PCIe conditionally</title>
<updated>2015-11-22T02:50:27Z</updated>
<author>
<name>Ryan Harkin</name>
<email>ryan.harkin@linaro.org</email>
</author>
<published>2015-11-18T10:39:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bc8d3bc0233df4f72172ae1552c8fa55e83538f8'/>
<id>urn:sha1:bc8d3bc0233df4f72172ae1552c8fa55e83538f8</id>
<content type='text'>
Only compile in PCIe support if the board really uses it. Provide
a __weak stub for the init function if e.g. FVP is being built.

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Juno: don't print PCI debug information by default</title>
<updated>2015-11-22T02:50:27Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2015-11-13T11:25:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0ee1a22b6dbf30158718ab59f294bf1103f63121'/>
<id>urn:sha1:0ee1a22b6dbf30158718ab59f294bf1103f63121</id>
<content type='text'>
On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Acked-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
</content>
</entry>
<entry>
<title>vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.</title>
<updated>2015-10-19T21:05:46Z</updated>
<author>
<name>Liviu Dudau</name>
<email>Liviu.Dudau@foss.arm.com</email>
</author>
<published>2015-10-19T10:08:32Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2fdc9b741bb5df62f8d2331a8e9974795d034956'/>
<id>urn:sha1:2fdc9b741bb5df62f8d2331a8e9974795d034956</id>
<content type='text'>
Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised
in order for the Linux kernel to be able to enumerate the bus. Add
support code here that enables the host bridge, trains the links and
sets up the Address Translation Tables.

Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
[trini: Always declare vexpress64_pcie_init and continue handling logic
inside the function]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.</title>
<updated>2015-10-19T21:05:28Z</updated>
<author>
<name>Liviu Dudau</name>
<email>Liviu.Dudau@foss.arm.com</email>
</author>
<published>2015-10-19T10:08:31Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2d0cee1ca2b9d977fa3214896bb2e30cfec77059'/>
<id>urn:sha1:2d0cee1ca2b9d977fa3214896bb2e30cfec77059</id>
<content type='text'>
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
Declare a secondary memory bank and set the sizes correctly.

Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Reviewed-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
</content>
</entry>
<entry>
<title>vexpress64: fvp dram: add DRAM configuration</title>
<updated>2015-10-11T21:11:47Z</updated>
<author>
<name>Ryan Harkin</name>
<email>ryan.harkin@linaro.org</email>
</author>
<published>2015-10-09T16:18:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc04b923541d984b1544056fd3bfa8129d4e5aac'/>
<id>urn:sha1:fc04b923541d984b1544056fd3bfa8129d4e5aac</id>
<content type='text'>
Create an additional FVP configuration to boot images pre-loaded into
DRAM.

Sometimes it's preferential to boot the model by loading the files
directly into DRAM via model parameters, rather than using
SemiHosting.

An example of model parmaters that are used to pre-load the files
into DRAM:
    --data cluster0.cpu0=Image@0x80080000 \
    --data cluster0.cpu0=fvp-base-gicv2-psci.dtb@0x83000000 \
    --data cluster0.cpu0=uInitrd@0x84000000

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
[trini: Update board/armltd/vexpress64/Kconfig logic]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>vexpress64: Kconfig: tidy up</title>
<updated>2015-10-11T13:17:03Z</updated>
<author>
<name>Ryan Harkin</name>
<email>ryan.harkin@linaro.org</email>
</author>
<published>2015-10-09T16:18:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b483cb5a949af444c06dd3cd9cfad70e645302e9'/>
<id>urn:sha1:b483cb5a949af444c06dd3cd9cfad70e645302e9</id>
<content type='text'>
The FVP and Juno settings were identical, but duplicated, so I removed
the duplication with this patch.

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
[trini: Adjust logic to keep if/endif in the file]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: Remove versatileab board</title>
<updated>2015-09-11T19:01:25Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-08-31T01:19:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b928e658f4f342d0834356ec7e37aef1b3e30829'/>
<id>urn:sha1:b928e658f4f342d0834356ec7e37aef1b3e30829</id>
<content type='text'>
This board has not been converted to generic board by the deadline.
Remove it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>integrator: switch to DM serial port</title>
<updated>2015-08-13T00:47:49Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2015-07-27T09:22:48Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3f394e70f0cc31a5d63d3650fd4f48e450ea16cd'/>
<id>urn:sha1:3f394e70f0cc31a5d63d3650fd4f48e450ea16cd</id>
<content type='text'>
This switches the Integrator boards over to using the device model
for its serial ports.

Cc: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
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