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<title>u-boot.git/board/armltd, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/board/armltd?h=v2017.09</id>
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<updated>2017-08-16T12:22:18Z</updated>
<entry>
<title>env: Rename setenv() to env_set()</title>
<updated>2017-08-16T12:22:18Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-08-03T18:22:09Z</published>
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<id>urn:sha1:382bee57f19b4454e2015bc19a010bc2d0ab9337</id>
<content type='text'>
We are now using an env_ prefix for environment functions. Rename setenv()
for consistency. Also add function comments in common.h.

Suggested-by: Wolfgang Denk &lt;wd@denx.de&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>arm: Add explicit include of &lt;asm/mach-types.h&gt;</title>
<updated>2017-06-05T15:02:36Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-06-01T01:47:48Z</published>
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<id>urn:sha1:c62db35d52c6ba5f31ac36e690c58ec54b273298</id>
<content type='text'>
Rather than relying on common.h to provide this include, which is going
away at some point, include it explicitly in each file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>dm: Use dm.h header when driver mode is used</title>
<updated>2017-06-01T12:57:52Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-17T23:18:03Z</published>
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<id>urn:sha1:9d922450aa9944ecf8c249c892078cda80f40e02</id>
<content type='text'>
This header includes things that are needed to make driver build. Adjust
existing users to include that always, even if other dm/ includes are
present

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>board_f: Drop setup_dram_config() wrapper</title>
<updated>2017-04-05T20:36:51Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-03-31T14:40:32Z</published>
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<id>urn:sha1:76b00aca4f1c13bc8f91a539e612abc70d0c692f</id>
<content type='text'>
By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>vexpress64: Juno: Change PCI buss addresses for IO to start from zero.</title>
<updated>2016-11-29T13:15:30Z</updated>
<author>
<name>Liviu Dudau</name>
<email>Liviu.Dudau@foss.arm.com</email>
</author>
<published>2016-11-22T11:19:18Z</published>
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<id>urn:sha1:88e0d59315f4863537a94f12ef48348764f4316b</id>
<content type='text'>
Juno uses a 1:1 mapping between CPU and PCI addresses for IO. First,
that will trip devices that cannot use more than 16 bits of addresses
for IO, second it is un-necessary as the system can handle zero-based
PCI addresses just fine.

Change the mapping to start IO bus addresses from zero.

Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
</content>
</entry>
<entry>
<title>vexpress: disable cci ace slave ports when booting in non-sec/hyp mode</title>
<updated>2016-10-07T14:26:30Z</updated>
<author>
<name>Sudeep Holla</name>
<email>Sudeep.Holla@arm.com</email>
</author>
<published>2016-09-23T16:38:39Z</published>
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<id>urn:sha1:03ab5d136b43296b2eb7d4dd80196381aa719a09</id>
<content type='text'>
Commit f225d39d3093 ("vexpress: Check TC2 firmware support before defaulting
to nonsec booting") added support to check if the firmware on TC2  is
configured appropriately before booting in nonsec/hyp mode.

However when booting in non-secure/hyp mode, CCI control must be done in
secure firmware and can't  be done in non-secure/hyp mode. In order to
ensure that, this patch disables the cci slave port inteface so that it
is not accessed at all.

Cc: Jon Medhurst &lt;tixy@linaro.org&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Acked-by: Jon Medhurst &lt;tixy@linaro.org&gt;
Tested-by: Jon Medhurst &lt;tixy@linaro.org&gt;
</content>
</entry>
<entry>
<title>vexpress: Check TC2 firmware support before defaulting to nonsec booting</title>
<updated>2016-08-15T22:46:38Z</updated>
<author>
<name>Jon Medhurst \(Tixy\)</name>
<email>tixy@linaro.org</email>
</author>
<published>2016-06-23T12:37:32Z</published>
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<id>urn:sha1:f225d39d30935c3d27271bee676ef554fa9b0f3c</id>
<content type='text'>
The firmware on TC2 needs to be configured appropriately before booting
in nonsec mode will work as expected, so test for this and fall back to
sec mode if required.

Signed-off-by: Jon Medhurst &lt;tixy@linaro.org&gt;
Reviewed-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
</content>
</entry>
<entry>
<title>armv8: mmu: Add support of non-identical mapping</title>
<updated>2016-07-15T16:01:43Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2016-06-24T23:46:22Z</published>
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<id>urn:sha1:cd4b0c5feaaa524b44889cde8f58d4b121df8fed</id>
<content type='text'>
Introduce virtual and physical addresses in the mapping table. This change
have no impact on existing boards because they all use idential mapping.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>vexpress64: Add MMU tables</title>
<updated>2016-03-15T19:13:04Z</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-03-04T00:09:51Z</published>
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<id>urn:sha1:e593bf5eb36669a5f8a55271eb8c14cb4cf93961</id>
<content type='text'>
There's no good excuse for running with caches disabled on AArch64,
so let's just move the vexpress64 target to enable the MMU and run
with caches on.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
</content>
</entry>
<entry>
<title>vexpress64: use 2nd DRAM bank only on juno</title>
<updated>2015-11-22T02:50:28Z</updated>
<author>
<name>Ryan Harkin</name>
<email>ryan.harkin@linaro.org</email>
</author>
<published>2015-11-18T10:39:07Z</published>
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<id>urn:sha1:2c2b218383f05be51e1bd5f5982a44b969c4b5a6</id>
<content type='text'>
This patch makes the 2nd DRAM bank available on Juno only and not on
other vexpress64 targets, eg. the FVP models.

The commit below added a 2nd bank of NOR flash for Juno, but also for
all vexpress64 targets:

    commit 2d0cee1ca2b9d977fa3214896bb2e30cfec77059
    Author: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
    Date:   Mon Oct 19 11:08:31 2015 +0100

    vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.

    Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel.
    Declare a secondary memory bank and set the sizes correctly.

    Signed-off-by: Liviu Dudau &lt;Liviu.Dudau@foss.arm.com&gt;
    Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
    Reviewed-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
    Tested-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;

Unfortunately, I only fully tested on Juno R0, R1 and the FVP Foundation
model.  Whilst FVP Base AEMV8 models run U-Boot OK, they fail to boot
the kernel.

Signed-off-by: Ryan Harkin &lt;ryan.harkin@linaro.org&gt;
Acked-by: Liviu Dudau &lt;liviu.dudau@foss.arm.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
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